LPC47N217-JV Standard Microsystems (SMSC), LPC47N217-JV Datasheet

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LPC47N217-JV

Manufacturer Part Number
LPC47N217-JV
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47N217-JV

Rad Hardened
No
Lead Free Status / Rohs Status
Compliant

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Product Features
SMSC LPC47N217
3.3 Volt Operation (5V tolerant)
Programmable Wakeup Event Interface
(IO_PME# Pin)
SMI Support (IO_SMI# Pin)
GPIOs (14)
Two IRQ Input Pins
XNOR Chain
PC99a, PC2001
ACPI 2.0 Compliant
64-pin STQFP Lead-free RoHS Compliant
Package
Intelligent Auto Power Management
Serial Ports
Infrared Communications Controller
− One Full Function Serial Port
− High Speed 16C550A Compatible UART with
− Supports 230k and 460k Baud
− Programmable Baud Rate Generator
− Modem Control Circuitry
− IrDA v1.2 (4Mbps), HPSIR, ASKIR, Consumer IR
− 1 IR Port
− 96 Base I/O Address, 15 IRQ Options and 3 DMA
Send/Receive 16-Byte FIFO
Support
Options
LPC47N217-JV for 64 pin STQFP lead-free RoHS compliant package
ORDERING INFORMATION
PRODUCT PREVIEW
Order Number:
Page 1
LPC47N217
64-Pin Super I/O with LPC
Interface
Multi-Mode Parallel Port with ChiProtect
LPC Bus Host Interface
− Standard Mode IBM PC/XT, PC/AT, and PS/2
− Enhanced Parallel Port (EPP) Compatible - EPP 1.7
− IEEE 1284 Compliant Enhanced Capabilities Port
− ChiProtect Circuitry for Protection Against Damage
− 192 Base I/O Address, 15 IRQ and 3 DMA Options
Compatible Bidirectional Parallel Port
and EPP 1.9 (IEEE 1284 Compliant)
(ECP)
Due to Printer Power-On
Multiplexed Command, Address and Data Bus
8-Bit I/O Transfers
8-Bit DMA Transfers
16-Bit Address Qualification
Serial IRQ Interface Compatible with Serialized
IRQ Support for PCI Systems
PCI CLKRUN# Support
Power Management Event (IO_PME#) Interface
Pin
Revision 0.2 (03-29-07)
Data Brief

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LPC47N217-JV Summary of contents

Page 1

... IrDA v1.2 (4Mbps), HPSIR, ASKIR, Consumer IR Support − Port − 96 Base I/O Address, 15 IRQ Options and 3 DMA Options LPC47N217-JV for 64 pin STQFP lead-free RoHS compliant package SMSC LPC47N217 LPC47N217 64-Pin Super I/O with LPC Interface Multi-Mode Parallel Port with ChiProtect − ...

Page 2

... REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Revision 0.2 (03-29-07) Page 2 PRODUCT PREVIEW SMSC LPC47N217 ...

Page 3

... General Description The SMSC LPC47N217 is a 3.3V PC 99, PC2001, and ACPI 2.0 compliant Super I/O Controller. The LPC47N217 implements the LPC interface, a pin reduced ISA interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. The part also includes 14 GPIO pins ...

Page 4

... CLKRUN# CLOCK GEN CLOCKI V Vcc Vss TR Revision 0.2 (03-29-07) IO_PME# CONTROL, ADDRESS, DATA ACPI CONFIGURATION BLOCK REGISTERS Figure 1 - LPC47N217 Block Diagram Page 4 PRODUCT PREVIEW PD[0:7], MULTI-MODE BUSY, SLCT, PARALLEL PE, nERROR, nACK PORT nSLCTIN, nALF nINIT, nSTROBE GP10, GP11, GP12*, GP13*, GP14*, ...

Page 5

... Maximum mold protrusion is 0.25 mm per side. D1 and E1 dimensions determined at datum plane H. 4. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane. 5. Details of pin 1 identifier are optional but must be located within the zone indicated. SMSC LPC47N217 MAX ~ 1. ...

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