SI2457-D-FS Silicon Laboratories Inc, SI2457-D-FS Datasheet - Page 31

• Manufacturer Part Number: SI2457-D-FS
• Description: IC ISOMODEM SYSTEM-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2457-D-FS

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.6. EEPROM Interface (24-Pin TSSOP and 38-Pin QFN Only)
The 24-pin TSSOP and 38-pin QFN packages feature an optional three-wire interface (EESD, EECS and EECLK)
that may be directly connected to SPI EEPROMs. An EEPROM may contain custom default settings, firmware
upgrades, and/or user-defined AT command macros for use in custom AT commands or country codes. Firmware
upgrades may also be automatically loaded into the ISOmodem using the BOOT format.
2.6.1. Supported EEPROM Types
The EEPROM must support SPI mode 3 with a 16-bit (8–64 kbit range) address. The EEPROM must be between
8192 and 65536 bits in size and support the commands given in Table 26. The EEPROM must also support 16-bit
addressing regardless of size, allow a clock frequency of at least 1 MHz, assert its output on falling edges of
EECLK and latch input data on rising edges of EECLK. All data are sent to and from the EEPROM with the LSB
first. Required EEPROM command format and signal timing are shown in Tables 26 to 28. A typical EEPROM-
access timing diagram is shown on Figure 11. Such EEPROMs are available from several different manufacturers,
for example:


WEL = write enable latch
WIP = write in progress
EECLK period
EESD input setup time
EESD input hold time
EESD output setup time*
EESD output hold time*
EECS asserted to EECLK positive edge
Microchip: 25LC080..25LC640
Atmel: AT25080..AT25640
Instruction Name
—
7
WRITE
WRSR
WREN
READ
RDSR
WRDI
Table 27. EEPROM Status Register (Any Other Bits are Unused)
—
6
Parameter
Instruction Format
—
5
0000 0010
0000 0100
0000 0101
0000 0001
0000 0011
0000 0110
Table 26. EEPROM Commands
Table 28. EEPROM Timing
—
4
Rev. 1.3
Read data from memory at address
Write data to memory array beginning at address
Clear write enable bit (disable write operation)
Read status register
Write status register
Set write enable bit (enable write operations)
—
3
Symbol
EOSU
ECSS
ECLK
EISU
EOH
EIH
Min.
—
100
100
500
500
500
1.0
2
Description
Typ.
—
—
—
—
—
—
WEL
1
Max.
—
—
—
—
—
—
AN93
WIP
0
Unit
µs
ns
ns
ns
ns
ns
31