QT310-IS Atmel, QT310-IS Datasheet - Page 11

• Manufacturer Part Number: QT310-IS
• Description: SENSOR IC TOUCH PROG 1CH 8-SOIC
• Manufacturer: Atmel
• Series: QProx™r
• Type: Capacitiver

Specifications of QT310-IS

• Rohs Status: RoHS non-compliant
• Touch Panel Interface: 1, 2-Wire
• Number Of Inputs/keys: 1 Key
• Resolution (bits): 16 b
• Data Interface: Serial
• Voltage Reference: Internal
• Voltage - Supply: 1.8 V ~ 5 V
• Current - Supply: 600µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Output Type: *
• Interface: *
• Input Type: *
• Package / Case: -
• Other names: 427-1028

2.9.1 D
One use for synchronization is where two or more QT310’s in
close proximity to each other are synchronously daisy-
chained to avoid crosstalk (Figure 2-3).
One QT310 should be designated as the ‘Master’; this part
must have the shortest sleep time, while the downstream
parts which depend on the master and any intermediary
devices must have longer sleep time settings than the master.
The parts can be chained in a loop (switch set to ‘closed
loop’); in this configuration the master will generates a new
burst after the last slave has finished, making the scan
sequence of all devices the most time-efficient possible. If the
master doesn’t received a pulse before the sleep time has
elapsed it will generate a new burst. This mode is most useful
if there are a relatively small number of devices in the chain
and there is a need for fast response.
In open-loop, the rep rate of acquisition is set purely by the
burst rate of the master. It is possible in this mode to have
very long chains of parts with relatively good response time.
The disadvantage of this mode is that it is possible for the
bursts of downstream slaves to overlap with upstream
devices, potentially causing interference if their electrodes are
in physical proximity to each other.
It is also possible to devise a tree structure of devices, where
some devices in the chain trigger two or more slaves. This
speeds up the acquisition process considerably, but some
thought must be given to timing considerations so that
adjacent electrodes do not have bursts which overlap each
other in time.
After the burst has completed the QT310 checks the level on
SYNC_I. If SYNC_I is high, the part goes back to sleep; if
SYNC_I is still low the device waits until the SYNC_I is high
again before going back to sleep. If this is the case, power
drain will be higher so it is important to limit the pulse width to
an amount less than the burst length (but greater than
>15µs).
LQ
Line Input
AISY
SENSOR
-C
1M
R1
HAINING
Figure 2-4 Line sync circuit
2.2nF
OUT1
R3
1M
C2
QT310’
CS
S
74HC14
U2:A
7
3
5
U1
OUT
SNS1
SNS2
VDD
VSS
Vdd
4.7k - 10K
8
/SYNC_O
R4
/SYNC_I
4
/CAL
100pF
1
6
2
C1
Vdd
/SYNC_O
470K-1M
R2
11
2.9.2 N
Using the sync feature, a QT310 can be synchronized to a
repetitive external source of interference such as the power
line frequency (Figure 2-4) in order to dramatically reduce
signal noise. If line frequency is present near the sensors, this
feature should be used.
With this circuit the sensor can tolerate hundreds of volts per
meter of electric field. It is particularly useful for line-powered
touch controls.
Noise sync and daisy-chaining can be combined by having
the first device in the chain sync to the external noise source.
3 Circuit Guidelines
3.1 SAMPLE CAPACITORS
Cs capacitors can be virtually any plastic film or low to
medium-K ceramic capacitor. The normal usable Cs range is
from 1nF ~ 200nF depending on the sensitivity required;
larger values of Cs require higher stability to ensure reliable
sensing. Acceptable capacitor types include NP0 or C0G
ceramic, PPS film, Y5E and X7R ceramic in that order.
3.2 POWER SUPPLY
3.2.1 S
The QT310 derives its internal references from the power
supply. Sensitivity shifts and timing changes will occur with
changes in Vdd, as often happens when additional power
supply loads are switched on or off via the Out pin.
These supply shifts can induce detection ‘cycling’, whereby an
object is detected, the load is turned on, the supply sags, the
detection is no longer sensed, the load is turned off, the
supply rises and the object is reacquired, ad infinitum.
Detection ‘stiction’, the opposite effect, can occur if a load is
shed when the output is active and the signal swings are
small: the Out pin can remain stuck even if the detected
object is no longer near the electrode.
3.2.2 S
Vdd can range from 1.8 to 5.0 volts. If Setups programming is
required during operation, the minimum Vdd is 2.2V. Current
drain will vary depending on Vdd, the chosen sleep cycles,
and the burst lengths. Increasing Cx values will decrease
power drain since increasing Cx loads decrease burst length
(Figures 5-1 and 5-2).
If the power supply is shared with another electronic system,
care should be taken to assure that the supply is free of
spikes, sags, and surges. In BG1 mode the QT310 will track
slow changes in Vdd if drift compensation is enabled, but it
can be adversely affected by rapid voltage steps and spikes
at the millivolt level.
If desired, the supply can be regulated using a conventional
low current regulator, for example CMOS LDO regulators with
low quiescent currents, or standard 78Lxx-series 3-terminal
regulators.
For proper operation a 100nF (0.1uF) ceramic bypass
capacitor must be used between Vdd and Vss; the bypass
cap should be placed very close to the Vdd and Vss pins.
TABILITY
UPPLY
OISE
S
R
YNCHRONIZATION
EQUIREMENTS
QT310/R1.01 07/02