MCP23017-E/ML Microchip Technology, MCP23017-E/ML Datasheet - Page 14

IC I/O EXPANDER I2C 16B 28QFN

MCP23017-E/ML

Manufacturer Part Number
MCP23017-E/ML
Description
IC I/O EXPANDER I2C 16B 28QFN
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP23017-E/ML

Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Interface
I²C
Number Of I /o
16
Interrupt Output
Yes
Frequency - Clock
1.7MHz
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
MCP23017
Propagation Delay Time
50 ns
Operating Supply Voltage
1.8 V to 5.5 V
Power Dissipation
700 mW
Operating Temperature Range
- 40 C to + 125 C
Input Voltage
1.8 V to 5.5 V
Logic Type
I/O Expander
Maximum Clock Frequency
10 MHz
Maximum Operating Frequency
1.7 MHz
Mounting Style
SMD/SMT
Output Current
25 mA
Output Voltage
1.8 V to 4.5 V
Package
28QFN EP
Chip Configuration
16 Bit
Bus Frequency
1.7MHz
Ic Interface Type
I2C
No. Of I/o's
16
Supply Voltage Range
1.8V To 5.5V
Digital Ic Case Style
QFN
No. Of Pins
28
Interface Type
I2C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP23X17EV - BOARD EVAL FOR MCP23X17GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPAD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP23017-E/ML
Manufacturer:
TI
Quantity:
12 580
Part Number:
MCP23017-E/ML
Manufacturer:
MIC
Quantity:
20 000
Part Number:
MCP23017-E/ML
0
MCP23017/MCP23S17
1.6.3
The GPINTEN register controls the interrupt-on-
change feature for each pin.
If a bit is set, the corresponding pin is enabled for
interrupt-on-change. The DEFVAL and INTCON
registers must also be configured if any pins are
enabled for interrupt-on-change.
REGISTER 1-3:
DS21952B-page 14
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
GPINT7
R/W-0
INTERRUPT-ON-CHANGE
CONTROL REGISTER
GPINT7:GPINT0: General purpose I/O interrupt-on-change bits <7:0>
1 = Enable GPIO input pin for interrupt-on-change event.
0 = Disable GPIO input pin for interrupt-on-change event.
Refer to INTCON and GPINTEN.
GPINT6
R/W-0
GPINTEN – INTERRUPT-ON-CHANGE PINS (ADDR 0x02)
W = Writable bit
‘1’ = Bit is set
GPINT5
R/W-0
GPINT4
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
GPINT3
R/W-0
GPINT2
R/W-0
© 2007 Microchip Technology Inc.
x = Bit is unknown
GPINT1
R/W-0
GPINT0
R/W-0
bit 0

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