MAX7430EUB+T Maxim Integrated Products, MAX7430EUB+T Datasheet - Page 10

• Manufacturer Part Number: MAX7430EUB+T
• Description: IC FILTER VIDEO SD 10-UMAX
• Manufacturer: Maxim Integrated Products

Specifications of MAX7430EUB+T

• Filter Type: Low Pass
• Frequency - Cutoff Or Center: 5MHz
• Number Of Filters: 2
• Max-order: 6th
• Voltage - Supply: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP Exposed Pad, 10-HMSOP, 10-eMSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Standard Definition Video Reconstruction
Filters and Buffers
CLEVEL: Clamp Level bit. A logic 0 selects a clamp
level of 1V while a logic 0 selects a clamp level of 1.5V
at the output.
[BOOST1, BOOST0]: High-Frequency Boost Control bits.
The adjust bits select the amount of high-frequency boost
for the filter. Table 2 defines four levels of adjustment.
OUTDISABLE: Output Disable bit. A logic 0 selects
normal operation while a logic 1 places the output in a
high-impedance state.
Table 3 defines the structure of the MAX7430 16-bit con-
trol register programmed by MSPB. This register controls
the selection of IN_A or IN_B, selection of filter 1 or 2, filter
bypassing, clamp-level selection, high-frequency boost
control, and output disable. See Maxim’s Single Pin Bus
Interface (MSPB) section for detailed programming
instructions.
ABSEL_: Channel Select bit. A logic zero selects the
input at IN_B to be processed while a logic 1 selects
the input at IN_A to be processed.
BYPASS_: Filter Bypass Select bit. A logic 1 selects
the channel filter while a logic 0 bypasses the channel
filter.
CLEVEL_: Clamp Level bit. A logic 0 selects a channel
clamp level of 1V while a logic 0 selects a channel
clamp level of 1.5V at the output.
[BOOST1_, BOOST0_]: High-Frequency Boost Control
bits. The adjust bits select the amount of high-frequency
boost for the channel filter. Table 4 defines four levels of
adjustment.
OUTDISABLE_: Output Disable bit. A logic 0 selects
normal channel output operation while a logic 1 puts
the channel output in a high-impedance state.
Table 3. MAX7430 Control Register
10
NAME
DEFAULT
NAME
DEFAULT
______________________________________________________________________________________
(MSB)
—
—
0
0
MAX7430 Control Register
ABSEL2
ABSEL1
1
1
BYPASS2
BYPASS1
1
1
CLEVEL2
CLEVEL1
0
0
Table 5 defines the structure of the MAX7432A 24-bit
control register programmed by MSPB. This register
controls the selection of IN_A or IN_B, selection of filter
1, 2, or 3, filter bypassing, clamp-level selection, high-
frequency boost control, and output disable. See
Maxim’s Single-Pin Bus Interface (MSPB) section for
detailed programming instructions.
ABSEL_: Channel Select bit. A logic zero selects the
input at IN_B to be processed while a logic 1 selects
the input at IN_A to be processed.
BYPASS_: Filter Bypass Select bit. A logic 1 selects
the channel filter while a logic 0 bypasses the channel
filter.
CLEVEL_: Clamp Level bit. A logic 0 selects a channel
clamp level of 1V while a logic 0 selects a channel
clamp level of 1.5V at the output.
[BOOST1_, BOOST0_]: High-Frequency Boost Control
bits. The adjust bits select the amount of high-frequency
boost for the channel filter. Table 6 defines four levels of
adjustment.
OUTDISABLE_: Output Disable Bit. A logic 0 selects
normal channel output operation while a logic 1 puts
the channel output in high-impedance state.
Table 4. Boost Level Programming
BOOST1(2)
BOOST1(1)
BOOST1_
0
0
0
0
1
1
BOOST0(2)
BOOST0(1)
BOOST0_
MAX7432A Control Register
0
0
0
1
0
1
DISABLE2
DISABLE1
OUT
OUT
FREQUENCY BOOST
0
0
RELATIVE HIGH
0.3dB to 0.5dB
0.6dB to 1.0dB
0.9dB to 1.5dB
0
FIRST BIT
—
—
0
0
(LSB)