TDA7333NTR STMicroelectronics, TDA7333NTR Datasheet

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TDA7333NTR

Manufacturer Part Number
TDA7333NTR
Description
IC SIGNAL PROC RDS/RDBS 16TSSOP
Manufacturer
STMicroelectronics
Type
RDS/RBDS Signal Processorr
Datasheet

Specifications of TDA7333NTR

Voltage - Supply, Analog
3 V ~ 3.6 V
Voltage - Supply, Digital
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-

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Features
Table 1.
1. Devices in ECOPACK® package (see
June 2008
3
for MPX sampling
Digital decimation and filtering stages
Demodulation of european radio data system
(RDS)
Demodulation of USA radio broadcast data
system (RBDS)
Automatic group and block synchronization
with flywheel mechanism
Error detection and correction
RAM buffer with a storage capacity of 24 RDS
blocks and related status information
Programmable interrupt source (RDS block
TA)
I
Common quartz frequency 8.55 MHz or
8.664 MHz
3.3 V power supply, 0.35 µm CMOS
technology
2
rd
E-TDA7333013TR
C/SPI bus interface
order high resolution sigma delta converter
Order code
E-TDA7333
Device summary
(1)
Operating temp. range, °C
Section 5: Package
-40 to +85
-40 to +85
Rev 1
information).
Description
The TDA7333 circuit is a RDS/RDBS signal
processor, intended for recovering the inaudible
RDS/RBDS informations which are transmitted on
most FM radio broadcasting stations.
TSSOP16
TSSOP16
Package
RDS/RBDS processor
TSSOP16
Tape and reel
TDA7333
Packing
Tube
www.st.com
1/26
1

Related parts for TDA7333NTR

TDA7333NTR Summary of contents

Page 1

Features rd ■ 3 order high resolution sigma delta converter for MPX sampling ■ Digital decimation and filtering stages ■ Demodulation of european radio data system (RDS) ■ Demodulation of USA radio broadcast data system (RBDS) ■ Automatic group and ...

Page 2

Contents Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Block ...

Page 3

TDA7333 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

List of figures List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 5

TDA7333 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram REF1 MPX 16 Cmpx SCL_CLK 11 SDA_DATAIN 12 SA_DATAOUT 13 CSN 14 1.2 Pin description Figure 2. Pin connection (top view) Cxti Cref Cref Cref 16pF ...

Page 6

Block diagram and pin description Table 2. Pin description Pin # Pin name 1 VDDA 2 REF3 3 REF2 4 REF1 5 VSS VDDD 8 RESETN 9 XTI 10 XTO 11 SCL_CLK 12 SDA_DATAIN 13 SA_DATAOUT Slave ...

Page 7

TDA7333 2 Electrical specifications 2.1 Quick reference Table 3. Quick Reference ( °C, VDDA/VDDD = 3 amb Symbol V /V Analog/digital power supply DDA DDD T Operating temperature amb f Quartz frequency osc I Total supply ...

Page 8

Electrical specifications 2.4 Electrical characteristics Table 6. Electrical characteristics T = -40 to +85 °C, V amb V and V must not differ more than 0.15 V DDD DDA Symbol Parameter Supply (pin 1,5,7) V Digital supply voltage DDD V ...

Page 9

TDA7333 Table 6. Electrical characteristics (continued -40 to +85 °C, V amb V and V must not differ more than 0.15 V DDD DDA Symbol Parameter Sigma delta modulator F Sample rate s OVR Oversampling ratio Relative total ...

Page 10

Functional description 3 Functional description 3.1 Overview The new RDS/RBDS processor contains all RDS/RBDS relevant functions on a single chip. It recovers the inaudible RDS/RBDS information which are transmitted on most FM radio broadcasting stations. Due to an integrated 3 ...

Page 11

TDA7333 and its frequency response is: with Figure 3. Transfer function 100 0 Figure 4. Magnitude response of sinc. 4/16 filter in RDS band 0 0.5 1 ...

Page 12

Functional description 3.4 RDS bandpass filter and interpolator th The 8 order digital RDS bandpass filter is of type Tschebyscheff and centered at 57 kHz. With linear phase characteristics in the passband and approximately flat group delay it guarantees best ...

Page 13

TDA7333 3.5 Demodulator The demodulator includes: ● RDS quality indicator with selectable sensitivity ● Selectable time constant of 57 kHz PLL ● Selectable time constant of bit PLL ● time constant selection done automatically or by software Figure 7. Demodulator ...

Page 14

Functional description bits marked as bad by the quality bit are allowed to be corrected in the group and block synchronization module. Thus the error correction is directly influenced by this setup. The time constant of the 57 kHz PLL ...

Page 15

TDA7333 This module is used to acquire group and block synchronization of the received RDS data stream, which is provided in a modified shortened cyclic code. For the theory and implementation of the modified shortened cyclic code, please refer to ...

Page 16

Functional description 3.7.1 rds_int register Figure 9. rds_int register rds_int bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset value 0 0 bit name write bne ar_res synch itsrc2 itsrc1 itsrc0 int ...

Page 17

TDA7333 3.7.3 rds_corrp register Figure 11. rds_corrp register rds_comp bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset value 0 bit name cp9 cp8 cp7 cp6 cp5 access r 3.7.4 rds_bd_h register ...

Page 18

Functional description 3.7.5 rds_bd_l register Figure 13. rds_bd_l register rds_bd_I bit 7 bit 6 0 reset value bit name m7 m6 access r 3.7.6 rds_bd_ctrl register rds_bd_ctrl register Figure 14. rds_bd_ctrl bit 7 bit 6 bit 5 bit 4 bit ...

Page 19

TDA7333 2 3 transfer mode This interface consists of three lines: a serial data line (SDA), a bit clock (SCL), and a slave address select (SA). The interface is capable of operating in fast mode (up to 400kbits/s) ...

Page 20

Functional description 3.8.2 Read transfer 2 Figure 18 read transfer S S lave addre ss from master to slave from slave to master Eight bytes can be read at a time (please refer to The master has always ...

Page 21

TDA7333 3.9 SPI mode Figure 21. SPI data transfer CSN CLK DATAIN DATAOUT update of shiftregister with registers content This interface consists of four lines. A serial data input (DATAIN), a serial data output (DATAOUT), a chip select input (CSN) ...

Page 22

Functional description Figure 23. Read out RDS data and related flags, no update of rds_int and rds_bd_ctrl registers CSN CLK DATAIN DATAOUT Figure 24. Write rds_int registers in SPI mode, reading 1 register CSN CLK DATAIN DATAOUT The content of ...

Page 23

TDA7333 4 Application notes A typical rds data transfer could work like this: 1. The micro sets the interrupt source to “RDS block” interrupt by setting itsrc[2:0] to 001. 2. The micro continuously checks the rds_int[7:0] bits for the first ...

Page 24

Package information 5 Package information In order to meet environmental requirements, ST (also) offers these devices in ECOPACK® packages. ECOPACK® packages are lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, ...

Page 25

TDA7333 6 Revision history Table 9. Document revision history Date 25-Jun-2008 Revision 1 Initial release. Revision history Changes 25/26 ...

Page 26

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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