ADV7189BKSTZ Analog Devices Inc, ADV7189BKSTZ Datasheet - Page 84

IC DECODER VIDEO W/ADC 80LQFP

ADV7189BKSTZ

Manufacturer Part Number
ADV7189BKSTZ
Description
IC DECODER VIDEO W/ADC 80LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet

Specifications of ADV7189BKSTZ

Applications
Set-Top Boxes, Video Players, Recorders
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
80-LQFP
Resolution (bits)
12bit
Input Format
Analog
Output Format
Digital
Adc Sample Rate
54MSPS
Power Dissipation Pd
450mW
No. Of Input Channels
12
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7189BKSTZ
Manufacturer:
INVENSENS
Quantity:
21 500
Part Number:
ADV7189BKSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADV7189B
Subaddress
0x51
0x8F
0x90
0x91
0x92
0x93
0x94
0x95
0x96
0x97
0x98
Register
Lock Count
Free Run
Line
Length 1
VBI Info
(Read-Only)
WSS1
(Read-Only)
WSS2
(Read-Only)
WSS2
(Read-Only)
EDTV2
(Read-Only)
EDTV3
(Read-Only)
CGMS1
(Read-Only)
CGMS2
(Read-Only)
CGMS3
(Read-Only)
Bit Description
CIL[2:0]. Count-into-lock
determines the number of lines the
system must remain in lock before
showing a locked status.
COL[2:0]. Count-out-of-lock
determines the number of lines the
system must remain out-of-lock
before showing a lost-locked
status.
SRLS. Select raw lock signal. Selects
the determination of the lock.
Status.
FSCLE. F
Reserved.
LLC_PAD_SEL[2:0]. Enables manual
selection of clock for LLC1 pin.
Reserved
WSSD. Screen signaling detected.
CCAPD. Closed-caption data.
EDTVD. EDTV sequence.
CGMSD. CGMS sequence.
Reserved.
WSS1[7:0]
Wide screen signaling data.
WSS2[7:0]
Wide screen signaling data.
WSS2[7:0]
Wide screen signaling data.
EDTV2[7:0]
EDTV data register.
EDTV3[7:0]
EDTV data register.
CGMS1[7:0]
CGMS data register.
CGMS2[7:0]
CGMS data register.
CGMS3[7:0]
CGMS data register.
SC
lock enable.
Rev. B | Page 84 of 104
7 6
0
1
0
x x
x x
x x
x x
x x
x x
x x
x x
x x
0
1
0
1
5
0
0
0
0
1
1
1
1
0
0
x
x
x
x
x
x
x
x
x
4 3
0
0
1
1
0
0
1
1
0
1
x
x
x
x
x
x
x
x
x
Bits
0
1
0
1
0
1
0
1
0
0
1
x
x
x
x
x
x
x
x
2
0
0
0
0
1
1
1
1
0
0
1
x
x
x
x
x
x
x
x
1
0
0
1
1
0
0
1
1
0
0
1
x
x
x
x
x
x
x
x
0
0
1
0
1
0
1
0
1
0
0
1
x
x
x
x
x
x
x
x
Comments
1 line of video
2 lines of video
5 lines of video
10 lines of video
100 lines of video
500 lines of video
1000 lines of video
100000 lines of video
1 line of video
2 lines of video
5 lines of video
10 lines of video
100 lines of video
500 lines of video
1000 lines of video
100000 lines of video
Over field with vertical
info
Line-to-line evaluation
Lock status set only by
horizontal lock
Lock status set by
horizontal lock and
subcarrier lock.
Set to default
LLC1 (nominal 27 MHz)
selected out on LLC1 pin
LLC2 (nominally 13.5 MHz)
selected out on LLC1 pin
Set to default
No WSS detected
WSS detected
No CCAP signals detected
CCAP sequence detected
No EDTV sequence
detected
EDTV sequence detected
No CGMS transition
detected
CGMS sequence decoded
WSS2[7:6] are
undetermined
EDTV3[7:6] are
undetermined
CGMS3[7:4] are
undetermined
Notes
For 16-bit 4:2:2 out,
OF_SEL[3:0] = 0010
Read-only status bits
EDTV3[5] is reserved
for future use

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