GS84036AT-150I GSI TECHNOLOGY, GS84036AT-150I Datasheet - Page 11

GS84036AT-150I

Manufacturer Part Number
GS84036AT-150I
Description
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS84036AT-150I

Density
4Mb
Access Time (max)
10ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
83.3MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
TQFP
Operating Temp Range
-40C to 85C
Number Of Ports
4
Supply Current
175mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Word Size
36b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
Mode Pin Functions
Note:
There are pull-up devices on LBO and FT pins and a pull down device on the ZZ pin, so those input pins can be unconnected and the chip will
operate in the default states as specified in the above tables.
Burst Counter Sequences
Linear Burst Sequence
Note:
The burst counter wraps to initial state on the 5th clock.
Rev: 1.19 10/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
1st address
2nd address
3rd address
4th address
Output Register Control
Power Down Control
Burst Order Control
Mode Name
A[1:0] A[1:0] A[1:0] A[1:0]
00
01
10
11
01
10
00
11
Name
10
11
00
01
LBO
Pin
ZZ
FT
00
01
10
11
H or NC
H or NC
L or NC
State
H
L
L
11/31
Standby, I
Interleaved Burst Sequence
Note:
The burst counter wraps to initial state on the 5th clock.
Interleaved Burst
1st address
2nd address
3rd address
4th address
Flow Through
Linear Burst
Function
Pipeline
Active
DD
= I
SB
GS84018/32/36AT/B-180/166/150/100
A[1:0] A[1:0] A[1:0] A[1:0]
00
01
10
11
01
00
11
10
10
00
01
11
© 1999, GSI Technology
11
10
01
00

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