DS90CF562MTDX National Semiconductor, DS90CF562MTDX Datasheet - Page 4

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DS90CF562MTDX

Manufacturer Part Number
DS90CF562MTDX
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of DS90CF562MTDX

Number Of Elements
3
Number Of Receivers
3
Number Of Drivers
21
Input Type
CMOS/TTL
Operating Supply Voltage (typ)
5V
Differential Input High Threshold Voltage
100mV
Diff. Input Low Threshold Volt
-100mV
Output Type
Flat Panel Display
Differential Output Voltage
450mV
Operating Temp Range
-10C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
TSSOP
Lead Free Status / Rohs Status
Not Compliant

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TRANSMITTER SUPPLY CURRENT
I
RECEIVER SUPPLY CURRENT
I
I
I
LLHT
LHLT
TCIT
TCCS
TPPos0
TPPos1
TPPos2
TPPos3
TPPos4
TPPos5
TPPos6
TPPos0
TPPos1
TPPos2
TPPos3
TPPos4
TPPos5
TPPos6
TCIP
TCIH
TCIL
TSTC
THTC
Symbol
Symbol
CCTZ
CCRW
CCRG
CCRZ
Over recommended operating supply and temperature ranges unless otherwise specified
Over recommended operating supply and temperature ranges unless otherwise specified
Electrical Characteristics
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
Note 2: Typical values are given for V
Note 3: Current into device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground unless otherwise speci-
fied (except V
Note 4: ESD Rating:
Transmitter Switching Characteristics
HBM (1.5 k , 100 pF)
PLL V
All other pins
EIAJ (0 , 200 pF)
CC
Transmitter Supply Current,
Power Down
Receiver Supply Current,
Worst Case
Receiver Supply Current,
16 Grayscale
Receiver Supply Current,
Power Down
LVDS Low-to-High Transition Time ( Figure 3 )
LVDS High-to-Low Transition Time ( Figure 3 )
TxCLK IN Transition Time ( Figure 5 )
TxOUT Channel-to-Channel Skew (Note 5) ( Figure 6 )
Transmitter Output Pulse Position for Bit 0 ( Figure 17 )
Transmitter Output Pulse Position for Bit 1
Transmitter Output Pulse Position for Bit 2
Transmitter Output Pulse Position for Bit 3
Transmitter Output Pulse Position for Bit 4
Transmitter Output Pulse Position for Bit 5
Transmitter Output Pulse Position for Bit 6
Transmitter Output Pulse Position for Bit 0 ( Figure 16 )
Transmitter Output Pulse Position for Bit 1
Transmitter Output Pulse Position for Bit 2
Transmitter Output Pulse Position for Bit 3
Transmitter Output Pulse Position for Bit 4
Transmitter Output Pulse Position for Bit 5
Transmitter Output Pulse Position for Bit 6
TxCLK IN Period ( Figure 7 )
TxCLK IN High Time ( Figure 7 )
TxCLK IN Low Time ( Figure 7 )
TxIN Setup to TxCLK IN ( Figure 7 )
TxIN Hold to TxCLK IN ( Figure 7 )
OD
1000V
and V
2000V
OD
150V
Parameter
).
CC
= 5.0V and T
(Continued)
A
= +25˚C.
Power Down = Low
C
Worst Case Pattern
( Figure 1 , Figure 4 )
C
16 Grayscale Pattern
( Figure 2 , Figure 4 )
Power Down = Low
Parameter
L
L
= 8 pF,
= 8 pF,
Conditions
4
f = 32.5 MHz
f = 37.5 MHz
f = 32.5 MHz
f = 37.5 MHz
f = 20 MHz
f = 40 MHz
f = 20 MHz
f = 40 MHz
Min
0.35T
0.35T
−200
−100
12.8
27.2
34.5
42.2
20.3
Min
6.3
2.9
6.1
9.7
2.5
20
13
17
25
14
8
Typ
55
60
35
37
1
1
0.75
0.75
13.6
20.8
35.2
42.6
10.2
13.5
17.4
20.8
0.5T
0.5T
Typ
150
100
7.2
3.3
6.6
28
T
2
Max
25
75
80
55
58
10
0.65T
0.65T
Max
14.6
21.5
28.5
35.6
42.9
10.7
14.1
17.8
21.4
350
350
300
1.5
1.5
7.5
3.9
7.1
50
8
Units
Units
mA
mA
mA
mA
µA
µA
ns
ns
ns
ps
ps
ns
ns
ns
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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