PEB24911HV13 Lantiq, PEB24911HV13 Datasheet - Page 17

• Manufacturer Part Number: PEB24911HV13
• Manufacturer: Lantiq

Specifications of PEB24911HV13

• Lead Free Status / Rohs Status: Supplier Unconfirmed

•
Figure 5
The DFE-Q devices are supplied by the first AFE at pin CL15 with the synchronized
15.36 MHz clock. The IOM
programmed by the two slot pins. Starting from channel no. 0/4/8/12 always four
subsequent channels are occupied.
Alternatively the clocking scheme as shown in
devices are to be clocked (e.g. in a 16-channel line card application). Instead to supply
the 2nd AFE with the master clock at pin CL15, here the 15.36 MHz master clock is input
at pin XIN. Thereby pin CL15 is configured as output and passes the 15.36 MHz clock
on to the attached DFE-Q. If the clock chain is extended in the same way by another two
AFE/DFE-Q chip sets a 16-channel line card application can be realized with just one
single crystal. Note that the 15.36 MHz clock is inverted once by the AFE if it is input at
XIN and output at CL15. This way the duty cycle is recovered again.
Data Sheet
4x U
4x U
Connecting Two AFE/DFE-Q Chip Sets
Hybrid
Hybrid
Hybrid
Hybrid
Hybrid
Hybrid
Hybrid
Hybrid
VDD/
VSS
XIN
XIN
15.36MHz
AFE V2.1
AFE V2.1
®
PEF 24902
PEF 24902
-2 channels the DFE-Q devices are assigned to can be
XOUT
XOUT
N.C.
8/ 2048kHz PTT
Reference Cock
CLOCK
CLOCK
VSS
CL15
CL15
15.36MHz
PDM0..3
PDM0..3
7
SDR
SDX
SDX
SDR
15.36MHz
Figure 6
CL15
CL15
DFE-Q V2.1
DFE-Q V2.1
PEF 24911
PEF 24911
may be applied if more than 3
1-4MBit/s
Introduction
PEF 24911
IOM
FSC
DCL
DIN
DOUT
2001-07-16
®
-2
clkchain1.v sd