PEB3086FV14XT Lantiq, PEB3086FV14XT Datasheet - Page 257

• Manufacturer Part Number: PEB3086FV14XT
• Manufacturer: Lantiq

Specifications of PEB3086FV14XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Index
A
A4SEL bit 190
A5SEL bit 190
A7SEL bit 190
Absolute maximum ratings 229
AC characteristics 233
ACFG1 register 190
ACFG2 register 190
ACKxy bits 206
ACL bit 190
Activation 89
Activation indication - pin ACL 45
Activation LED 45
Activation/deactivation of IOM-2 interface
AOE register 192
Appendix 250
Applications 20
AR7-0 bits 192
Architecture 30
ARX register 192
ASTI register 206
Asynchronous awake 132
AT7-0 bits 193
ATX register 193
AUX bit 211
AUXI register 212
Auxiliary interface 133
AUXM register 213
B
BAC bit 178
BAS bit 177
BCH_CR registers 198
BCH_TSDP_BC1/2 registers 195
BUS bit 180
Bus operation modes 37
C
C/I channel 119
C/R bit 175, 226
Capacitances 231
Data Sheet
130
257
CDA_TSDPxy registers 195
CDAx_CR register 196
CDAxy registers 194
CFS bit 213
CI_CS bit 203
CI1E bit 179
CIC bit 211
CIC1/0 bits 177
CICW bit 179
CIR0 register 177
CIR1 register 179
CIX0 register 178
CIX1 register 179
CLKM bit 203
Clock generation 66
CMDR register 167
CMDRB register 220
CNT bits 172, 217
CODR0 bits 177
CODR1 bits 179
CODX0 bits 178
CODX1 bits 179
Control of layer-1 71
Controller data access 97
CRC bit 175, 226
D
D_EN_B2/1 bits 199
D_EN_D bit 199
DC characteristics 230
DCH_INH bit 188
D-channel access control
DCI_CR register 199
Deactivation 89
Delay between IOM-2 and S 55
DESIGN bits 216
Device architecture 30
DIM2-0 bits 168
Direct address mode 37
Intelligent NT 126
S-bus D-channel control in LT-T 126
S-bus priority mechanism 123
TIC bus 121
PEB 3086
2003-01-30
ISAC-SX