MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 103

• Manufacturer Part Number: MC68HC711KS2MFN4
• Description: 32K EPROM - SLOW MODE
• Manufacturer: Freescale Semiconductor

4.9.2 System Configuration Options 2 Register
M68HC11K Family
MOTOROLA
XDV[1:0]
0
0
1
1
0
1
0
1
Divided By
EXTAL
1
4
6
8
Address: $0038
XDV[1:0] — XOUT Clock Divide Select Bits
EXTAL = 8 MHz
Reset:
Frequency at
Read:
Write:
Figure 4-15. System Configuration Options 2 Register (OPT2)
These two bits select the divisor for the XOUT clock frequency, as
shown in
(XOUT = XTAL). It takes a maximum of 16 cycles after writing these
bits for XOUT to stabilize. The phase relationship between XOUT and
XTAL cannot be predicted.
1.33 MHz
8 MHz
2 MHz
1 MHz
Operating Modes and On-Chip Memory
Table 4-10. XOUT Frequencies
LIRDV
1. Not available on M68HC11K devices
Bit 7
0
Table
CWOM
EXTAL = 12 MHz
6
0
4-10. The divisor is set to 1 out of reset
Frequency at
1.5 MHz
12 MHz
3 MHz
2 MHz
STRCH
5
0
(1)
IRVNE
—
4
EXTAL = 16 MHz
Frequency at
Operating Modes and On-Chip Memory
2.67 MHz
16 MHz
4 MHz
2 MHz
LSBF
3
0
SPR2
2
0
EXTAL = 16 MHz
Frequency at
XOUT Pin Control
XDV1
3.33 MHz
2.5 MHz
1
0
20 MHz
Technical Data
5 MHz
XDV0
Bit 0
0
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