ICS1893Y-10 IDT, Integrated Device Technology Inc, ICS1893Y-10 Datasheet - Page 119

• Manufacturer Part Number: ICS1893Y-10
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893Y-10

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 1893Y-10; 800-1934-5; ICS1893Y-10

ICS1893Y-10 Rev F 1/20/04
Table 8-7. MAC/Repeater Interface Pins: 10M Serial Interface (Continued)
RXDV
RXER
RXTRI
TXCLK
TXD0
TXD1,
TXD2,
TXD3
TXEN
TXER
MII Pin
Name
ICS1893Y-10 - Release
10RXDV
–
10TCLK
10TD
–
10TXEN
–
Symbol
Name
100M
Pin
No.
Pin
46,
47,
36
39
41
43
45
48
44
42
Copyright © 2004, Integrated Circuit Systems, Inc.
connect
connect
connect
Output
Output
Type
Input
Input
Input
Pin
No
No
No
10M (Serial Interface) Receive Data Valid.
The ICS1893Y-10 asserts 10RXDV to indicate to the
MAC/repeater that data is available on the MII Receive Bus
(RXD[3:0]). The ICS1893Y-10:
Receive Error.
For the 10M Serial Interface, this pin is a no connect. For more
information, see
Receive (Interface), Tri-State.
10M (Serial Interface) Transmit Clock.
This pin’s description is the same as that given in
10M (Serial Interface) Transmit Data.
This pin’s description is the same as that given in
Transmit Data 1–3.
For the 10M Serial Interface, these pins are a no connect. For
more information, see
10M (Serial Interface) Transmit Enable.
This pin’s description is the same as that given in
Transmit Error.
For the 10M Serial Interface, this pin is a no connect. For more
information, see
Note: 10RXDV is synchronous with the Receive Data Clock,
•
•
•
•
All rights reserved.
Asserts 10RXDV after it detects and recovers the
Start-of-Stream delimiter, /J/K/. (For the timing reference,
see
Synchronous Receive
De-asserts 10RXDV after it detects either the End-of-Stream
delimiter (/T/R/) or a signal error.
The input on this pin is from a MAC. When the signal on this
pin is logic:
– Low, the MAC indicates that it is not in a tri-state condition.
– High, the MAC indicates that it is in a tri-state condition. In
If the PHY address is 00, the ICS1893Y-10 acts as if the
RX-TRI pin is held high.
this case, the ICS1893Y-10 acts to ensure that only one
PHY is active at a time.
119
10RCLK.
Chapter 9.5.6, “MII / 100M Stream Interface:
Table
Table
Chapter 8 Pin Diagram, Listings, and Descriptions
Table
5-2.
5-2.
Pin Description
Timing”.)
5-2.
Table
Table
Table
January, 2004
8-5.
8-5.
8-5.