PIC18F4620-I/PT Microchip Technology Inc., PIC18F4620-I/PT Datasheet - Page 381

• Manufacturer Part Number: PIC18F4620-I/PT
• Description: 44 Pin, 64 KB Flash, 3968 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4620-I/PT

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 36
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 4K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

INTCON Registers ....................................................... 93–95
Inter-Integrated Circuit. See I
Internal Oscillator Block ..................................................... 26
Internal RC Oscillator
Interrupt Sources ............................................................. 249
 2004 Microchip Technology Inc.
DECFSZ ................................................................... 287
Extended Instruction Set .......................................... 309
General Format ........................................................ 269
GOTO ...................................................................... 288
INCF ......................................................................... 288
INCFSZ .................................................................... 289
INFSNZ .................................................................... 289
IORLW ..................................................................... 290
IORWF ..................................................................... 290
LFSR ........................................................................ 291
MOVF ....................................................................... 291
MOVFF .................................................................... 292
MOVLB .................................................................... 292
MOVLW ................................................................... 293
MOVWF ................................................................... 293
MULLW .................................................................... 294
MULWF .................................................................... 294
NEGF ....................................................................... 295
NOP ......................................................................... 295
Opcode Field Descriptions ....................................... 268
POP ......................................................................... 296
PUSH ....................................................................... 296
RCALL ..................................................................... 297
RESET ..................................................................... 297
RETFIE .................................................................... 298
RETLW .................................................................... 298
RETURN .................................................................. 299
RLCF ........................................................................ 299
RLNCF ..................................................................... 300
RRCF ....................................................................... 300
RRNCF .................................................................... 301
SETF ........................................................................ 301
SETF (Indexed Literal Offset Mode) ........................ 315
SLEEP ..................................................................... 302
SUBFWB .................................................................. 302
SUBLW .................................................................... 303
SUBWF .................................................................... 303
SUBWFB .................................................................. 304
SWAPF .................................................................... 304
TBLRD ..................................................................... 305
TBLWT ..................................................................... 306
TSTFSZ ................................................................... 307
XORLW .................................................................... 307
XORWF .................................................................... 308
Adjustment ................................................................. 26
INTIO Modes .............................................................. 26
INTOSC Frequency Drift ............................................ 26
INTOSC Output Frequency ........................................ 26
OSCTUNE Register ................................................... 26
PLL in INTOSC Modes .............................................. 26
Use with WDT .......................................................... 258
A/D Conversion Complete ....................................... 227
Capture Complete (CCP) ......................................... 141
Compare Complete (CCP) ....................................... 142
Interrupt-on-Change (RB7:RB4) .............................. 108
INTn Pin ................................................................... 103
PORTB, Interrupt-on-Change .................................. 103
TMR0 ....................................................................... 103
TMR0 Overflow ........................................................ 125
TMR1 Overflow ........................................................ 127
2
C.
PIC18F2525/2620/4525/4620
Preliminary
Interrupts ........................................................................... 91
Interrupts, Flag Bits
INTOSC, INTRC. See Internal Oscillator Block.
IORLW ............................................................................. 290
IORWF ............................................................................. 290
IPR Registers ................................................................... 100
L
LFSR ............................................................................... 291
Low-Voltage ICSP Programming.
M
Master Clear (MCLR) ......................................................... 43
Master Synchronous Serial Port (MSSP).
Memory Organization ........................................................ 53
Memory Programming Requirements .............................. 338
Migration from Baseline to Enhanced Devices ................ 372
Migration from High-End to Enhanced Devices ............... 373
Migration from Mid-Range to Enhanced Devices ............ 373
MOVF .............................................................................. 291
MOVFF ............................................................................ 292
MOVLB ............................................................................ 292
MOVLW ........................................................................... 293
MOVSF ............................................................................ 311
MOVSS ............................................................................ 312
MOVWF ........................................................................... 293
MPLAB ASM30 Assembler,
MPLAB ICD 2 In-Circuit Debugger .................................. 319
MPLAB ICE 2000 High-Performance
MPLAB ICE 4000 High-Performance
MPLAB Integrated Development
MPLAB PM3 Device Programmer ................................... 319
MPLINK Object Linker/
MSSP
MULLW ............................................................................ 294
MULWF ............................................................................ 294
N
NEGF ............................................................................... 295
NOP ................................................................................. 295
TMR2 to PR2 Match (PWM) ............................ 144, 149
TMR3 Overflow ................................................ 135, 137
Interrupt-on-Change (RB7:RB4)
See Single-Supply ICSP Programming
See MSSP.
Data Memory ............................................................. 59
Program Memory ....................................................... 53
Linker, Librarian ....................................................... 318
Universal In-Circuit Emulator ................................... 319
Universal In-Circuit Emulator ................................... 319
Environment Software ............................................. 317
MPLIB Object Librarian ........................................... 318
ACK Pulse ....................................................... 174, 175
Control Registers (general) ..................................... 161
I
Module Overview ..................................................... 161
SPI Master/Slave Connection .................................. 165
SPI Mode. See SPI Mode.
SSPBUF Register .................................................... 166
SSPSR Register ...................................................... 166
2
C Mode. See I
Flag (RBIF Bit) ................................................. 108
2
C Mode.
DS39626B-page 379