KSZ8041TL-S Micrel Inc, KSZ8041TL-S Datasheet - Page 3

• Manufacturer Part Number: KSZ8041TL-S
• Description: IC TXRX PHY 10/100 BASE 48TQFP
• Manufacturer: Micrel Inc
• Type: Transceiverr

Specifications of KSZ8041TL-S

• Number Of Drivers/receivers: 1/1
• Protocol: SMII
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3626; KSZ8041TL-S

Micrel, Inc.
Revision History
December 2009
Revision
1.0
1.1
1.2
Date
12/21/06
4/27/07
12/9/09
Added maximum MDC clock speed.
Added 40K +/-30% to note 1 of Pin Description and Strapping Options tables for internal pull-ups/pull-
downs.
Changed Model Number in Register 3h – PHY Identifier 2.
Changed polarity (swapped definition) of DUPLEX strapping pin.
Removed DUPLEX strapping pin update to Register 4h – Auto-Negotiation Advertisement bits [8, 6].
Added Back-to-Back mode for KSZ8041TL.
Added Symbol Error to MII/RMII Receive Error description and Register 15h – RXER Counter.
Added a 100pF capacitor on REXT (pin 16) in Pin Description table.
Updated Ordering Information.
Changed MDIO hold time (min) from 10ns to 4ns.
Added thermal resistance (
Added chip maximum current consumption.
Added LED drive current.
Renamed Register 3h bits [3:0] to “manufacturer’s revision number” and changed default value to
“Indicates silicon revision.”
Updated RMII output delay for CRSDV and RXD[1:0] output pins.
Added support for Asymmetric PAUSE in register 4h bit [11].
Added control bits for 100Base-TX preamble restore (register 14h bit [7]) and 10Base-T preamble
restore (register 14h bit [6]).
Changed strapping pin definition for CONFIG[2:0] = 100 from “PCS Loopback” to “MII 100Mbps
Preamble Restore.”
Corrected MII timing for t
Added SMII timing.
Added KSZ8041MLL device and updated entire data sheet accordingly.
Added 48-Pin LQFP package information.
Summary of Changes
Data sheet created.
RLAT
JC
, t
).
CRS1
, t
CRS2
3
.
KSZ8041TL/FTL/MLL
M9999-120909-1.2