FAN5019MTC Fairchild Semiconductor, FAN5019MTC Datasheet - Page 22

• Manufacturer Part Number: FAN5019MTC
• Description: DC/DC Switching Controllers PWM 4 phases contrlr
• Manufacturer: Fairchild Semiconductor

Specifications of FAN5019MTC

• Number Of Outputs: 4
• Input Voltage: 10.2 V to 13.8 V
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-28
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C

FAN5019
where K=4.6
Using eight 820µF A1-Polys with a typical ESR of 8m ,
each yields CX = 6.56µF with an RX = 1.0m . One last
check should be made to ensure that the ESL of the bulk
capacitors (LX) is low enough to limit the initial high-
frequency transient spike. This can be tested using:
In this example, L
tors, which satisfies this limitation. If the L
bulk capacitor bank is too large, the number of MLC capaci-
tors must be increased. One should note for this multi-mode
control technique, “all-ceramic” designs can be used as
long as the conditions of Equations 11, 12 and 13 are
satisfied.
Power MOSFETs
For this example, the N-channel power MOSFETs have been
selected for one high-side switch and two low-side switches
per phase. The main selection parameters for the power
MOSFETs are V
The minimum gate drive voltage (the supply voltage to the
FAN5009) dictates whether standard threshold or logic-level
threshold MOSFETs must be used. With V
logic-level threshold MOSFETs (V
recommended. The maximum output current I
the R
MOSFETs. With the FAN5019, currents are balanced
between phases, thus the current in each low-side MOSFET
is the output current divided by the total number of
MOSFETs (n
the following expression shows the total power being
dissipated in each synchronous MOSFET in terms of the
ripple current per phase (I
current (I
Knowing the maximum output current being designed for
and the maximum allowed power dissipation, one can find
the required R
MOSFETs up to an ambient temperature of 50ºC, a safe
limit for P
Thus, for our example (65A maximum), we find R
22
C
C
P
L
L
SF
X
X
X
X
(
(
MIN
MAX
DS(ON)
)
1
)
220
C
Z
O
D
3
SF
3
):
650
R
F
4
requirement for the low-side (synchronous)
is 1W–1.5W at 125ºC junction temperature.
SF
1
6 .
650
O
DS(ON)
2
3 .
2
nH
). With conduction losses being dominant,
m
n
GS(TH)
I
nH
1
SF
X
O
3 .
1
3 .
is 375pH for the eight A1-Poly capaci-
m
60
2
m
for the MOSFET. For D-PAK
1
250
5 .
, Q
A
12
V
1
mV
2
2
R
G
) and average total output
, C
1
220
5 .
372
n
ISS
V
n
SF
I
, C
F
pH
R
GS(TH)
RSS
1
2
. 6
150
45
and R
R
DS
< 2.5V) are
GATE
mF
X
(
SF
of the chosen
s
250
DS(ON)
)
O
1
~10V,
determines
5 .
mV
V
DS(SF)
.
3
650
(14)
(15)
4
6 .
nH
1
3 .
m
(per MOSFET) < 8.7m . This R
temperature of about 125ºC, so we need to make sure we
account for this when making this selection. For our exam-
ple, we selected two lower side MOSFETs at 8.6m each at
room temperature, which gives 8.4m at high temperature.
Another important factor for the synchronous MOSFET is
the input capacitance and feedback capacitance. The ratio
of the feedback to input needs to be small (less than 10% is
recommended), to prevent accidental turn-on of the synchro-
nous MOSFETs when the switch node goes high.
Also, the time to switch the synchronous MOSFETs off
should not exceed the non-overlap dead time of the
MOSFET driver (40ns typical for the FAN5009). The
output impedance of the driver is about 2 and the typical
MOSFET input gate resistances are about 1 –2 , so a total
gate capacitance of less than 6000pF should be adhered to.
Since there are two MOSFETs in parallel, we should limit
the input capacitance for each synchronous MOSFET to
3000pF.
The high-side (main) MOSFET has to be able to handle two
main power dissipation components; conduction and switch-
ing losses. The switching loss is related to the amount of
time it takes for the main MOSFET to turn on and off, and to
the current and voltage that are being switched. Basing the
switching speed on the rise and fall time of the gate driver
impedance and MOSFET input capacitance, the following
expression provides an approximate value for the switching
loss per main MOSFET, where n
main MOSFETs:
Here, R
and about 1 for typical high speed switching MOSFETs,
making R
main MOSFET. It is interesting to note that adding more
main MOSFETs (nMF) does not really help the switching
loss per MOSFET since the additional gate capacitance
slows down switching. The best way to reduce switching
loss is to use lower gate capacitance devices.
The conduction loss of the main MOSFET is given by the
following, where R
MOSFET:
P
P
S
C
(
(
2
MF
MF
)
)
1
G
D
2
is the total gate resistance (2 for the FAN5009
G
220
= 3 ) and CISS is the input capacitance of the
f
SW
F
n
I
MF
O
23
V
DS(MF)
2
CC
9 .
n
mF
MF
12
1
I
O
is the ON-resistance of the
n
n
R
MF
G
MF
I
DS(SF)
R
PRODUCT SPECIFICATION
is the total number of
n
2
n
MF
is also at a junction
R
DS
C
REV. 1.0.7 1/5/04
(
MF
ISS
)
(17)
(16)