S-8261AAHMD-G2H-T2 Seiko Instruments, S-8261AAHMD-G2H-T2 Datasheet - Page 24

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S-8261AAHMD-G2H-T2

Manufacturer Part Number
S-8261AAHMD-G2H-T2
Description
Battery Management 4.28V Single Cell
Manufacturer
Seiko Instruments

Specifications of S-8261AAHMD-G2H-T2

Product
Li-Ion Protection
Battery Type
Li-Ion, Li-Pol
Output Voltage
8 V
Operating Supply Voltage
1.5 V to 8 V
Supply Current
7 uA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
SOT-23-6
Mounting Style
SMD/SMT
Uvlo Start Threshold
1 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
*1. If the threshold voltage of an FET is low, the FET may not cut the charging current.
*2. If the withstanding voltage between the gate and source is lower than the charger voltage, the FET may
*3. If R1 has a high resistance, the voltage between VDD and VSS may exceed the absolute maximum
*4. If a capacitor of less than 0.022 µF is connected to C1, DO may oscillate when load short-circuiting is
*5. If R2 has a resistance higher than 4 kΩ, the charging current may not be cut when a high-voltage charger
24
Symbol
BATTERY PROTECTION IC FOR SINGLE-CELL PACK
S-8261 Series
FET1
FET2
Battery Protection IC Connection Example
R1
C1
R2
If an FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used,
discharging may be stoped before overdischarge is detected.
be destroyed.
rating when a charger is connected in reverse since the current flows from the charger to the IC. Insert a
resistor of 300 Ω or higher to R1 for ESD protection.
detected.
is connected.
N-channel
N-channel
MOS FET
MOS FET
Capacitor For power fluctuation
Resistor
Resistor
Part
Be sure to connect a capacitor of 0.022 µF or higher to C1.
Discharge control
Charge control
ESD protection,
For power fluctuation
Protection for reverse
connection of a charger
Purpose
Battery
Table 14 Constant for External Components
470 Ω
0.1 µF
R1
C1
0.1 µF 0.022 µF 1.0 µF
470 Ω
2 kΩ
Typ.
VSS
VDD
FET1
Seiko Instruments Inc.
DO
300 Ω
300 Ω
Min.
S-8261 Series
Figure 11
FET2
CO
Max.
1 kΩ
4 kΩ
Threshold voltage ≤ Overdischarge detection voltage
Gate to source withstanding voltage ≥ Charger voltage
Threshold voltage ≤ Overdischarge detection voltage
Gate to source withstanding voltage ≥ Charger voltage
Resistance should be as small as possible to avoid
lowering of the overcharge detection accuracy caused
by VDD pin current.
Install a capacitor of 0.022 µF or higher between VDD
and VSS.
Select as large a resistance as large as possible to
prevent current when a charger is connected in
reverse.
VM
R2
2 kΩ
*5
*4
DP
*3
EB+
EB−
Remarks
Rev.1.9
_00
*1
*1
*2
*2

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