MC68020RC20E Freescale Semiconductor, MC68020RC20E Datasheet - Page 217
MC68020RC20E
Manufacturer Part Number
MC68020RC20E
Description
IC MICROPROCESSOR 32BIT 114-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68020EH16E.pdf
(306 pages)
Specifications of MC68020RC20E
Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
114-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
114
Package Type
PGA
Lead Free Status / RoHS Status
Contains lead / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68020RC20E
Manufacturer:
FREESCALE
Quantity:
1 831
Part Number:
MC68020RC20E
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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8.1.4 Instruction Execution Overlap
Overlap is the time, measured in clocks, when two instructions execute concurrently. In
Figure 8-1, instructions A and B execute concurrently, and the overlapped portion of
instruction B is absorbed in the instruction execution time of A (the previous instruction).
The overlap time is deducted from the execution time of instruction B. Similarly, there is an
overlap period between instruction B and instruction C, which reduces the attributed
execution time for C.
The execution time attributed to instructions A, B, and C (after considering the overlap) is
depicted in Figure 8-2.
It is possible that the execution time of an instruction will be absorbed by the overlap with
a previous instruction for a net execution time of zero clocks.
Because of this overlap, a NOP is required between a write to a peripheral to clear an
interrupt request and a subsequent MOVE to SR instruction to lower the interrupt mask
level. Otherwise, the MOVE to SR instruction may complete before the write is
accomplished, and a new interrupt exception will be generated for an old interrupt request.
MOTOROLA
Figure 8-2. Instruction Execution for Instruction Timing Purposes
INSTRUCTION A
INSTRUCTION A
Figure 8-1. Concurrent Instruction Execution
Freescale Semiconductor, Inc.
For More Information On This Product,
INSTRUCTION A)
(ABSORBED BY
OVERLAP
OVERLAP
PERIOD
Go to: www.freescale.com
M68020 USER’S MANUAL
INSTRUCTION B
INSTRUCTION B
INSTRUCTION B)
(ABSORBED BY
OVERLAP
OVERLAP
PERIOD
INSTRUCTION C
INSTRUCTION C
8- 3
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