XC2018-70PC68C Xilinx Inc, XC2018-70PC68C Datasheet - Page 17

• Manufacturer Part Number: XC2018-70PC68C
• Description: IC LOGIC CL ARRAY 1800GAT 68PLCC
• Manufacturer: Xilinx Inc
• Series: XC2000r

Specifications of XC2018-70PC68C

• Number Of Labs/clbs: 100
• Total Ram Bits: 17878
• Number Of I /o: 58
• Number Of Gates: 1500
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Logic Elements/cells: -
• Other names: 122-1003

Master Serial Mode Programming Switching Characteristics
Notes: 1. At power-up, V
CCLK
2. Master-serial-mode timing is based on slave-mode testing.
2
layed by holding RESET Low until V
a non-monotonically rising V
D/P after V
Serial Data In
Serial DOUT
(Output)
(Output)
CCLK
CC
has reached 4.0 V (2.5 V for XC2000L).
CC
must rise from 2.0 V to V
Description
Data In setup
Data In hold
1
CC
T
Speed Grade
DSCK
may require a >1- s High level on RESET, followed by a >6- s Low level on RESET and
CC
has reached 4.0 V (2.5 V for XC2000L). A very long V
CC
min in less than 25 ms. If this is not possible, configuration can be de-
2 T
2-201
CKDS
1
2
Symbol
T
T
DSCK
CKDS
Min
60
0
-50
Max
Min Max
60
0
-70
CC
rise time of >100 ms, or
Min Max
60
X5406
0
-100
Units
ns
ns