XC5VLX110T-1FFG1738C Xilinx Inc, XC5VLX110T-1FFG1738C Datasheet - Page 295

IC FPGA VIRTEX-5 110K 1738FBGA

XC5VLX110T-1FFG1738C

Manufacturer Part Number
XC5VLX110T-1FFG1738C
Description
IC FPGA VIRTEX-5 110K 1738FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr

Specifications of XC5VLX110T-1FFG1738C

Number Of Logic Elements/cells
110592
Number Of Labs/clbs
8640
Total Ram Bits
5455872
Number Of I /o
680
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1738-BBGA, FCBGA
Package
1738FCBGA
Family Name
Virtex®-5
Device Logic Units
110592
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
680
Ram Bits
5455872
For Use With
HW-V5-ML523-FXT-UNI-G-J - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-FXT-UNI-G - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC5VLX110T-1FFG1738C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VLX110T-1FFG1738C
Manufacturer:
XILINX
0
Part Number:
XC5VLX110T-1FFG1738CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Transmitter Termination
Receiver Termination
The Virtex-5 FPGA LVDS transmitter does not require any external termination.
lists the allowed attributes corresponding to the Virtex-5 FPGA LVDS current-mode
drivers. Virtex-5 FPGA LVDS current-mode drivers are a true current source and produce
the proper (EIA/TIA compliant) LVDS signal.
Figure 6-87
50 Ω transmission lines.
X-Ref Target - Figure 6-87
Figure 6-88
50 Ω transmission lines.
X-Ref Target - Figure 6-88
Table 6-36
Table 6-36: Allowed Attributes of the LVDS I/O Standard
IOSTANDARD
DIFF_TERM
Attributes
LVDS_25
External Termination
lists the available Virtex-5 FPGA LVDS I/O standards and attributes supported.
is an example of a differential termination for an LVDS receiver on a board with
is an example of differential termination for an LVDS receiver on a board with
Figure 6-88: LVDS_25 With DIFF_TERM Receiver Termination
LVDS_25
IOB
Figure 6-87: LVDS_25 Receiver Termination
www.xilinx.com
IOB
IBUFDS/IBUFGDS
0
TRUE, FALSE
Z
Z
0
0
R DIFF = 2Z 0 = 100Ω
= 50Ω
= 50Ω
Specific Guidelines for I/O Supported Standards
0
Z 0
Z 0
LVDS_25, LVDSEXT_25
Primitives
IOB
R DIFF = 100Ω
IOB
OBUFDS/OBUFTDS
+
N/A
LVDS_25
LVDS_25
+
ug190_6_81_030506
ug190_6_82_030506
Data in
Table 6-36
295

Related parts for XC5VLX110T-1FFG1738C