EPM9560ARI208-10 Altera, EPM9560ARI208-10 Datasheet - Page 25

IC MAX 9000 CPLD 560 208-RQFP

EPM9560ARI208-10

Manufacturer Part Number
EPM9560ARI208-10
Description
IC MAX 9000 CPLD 560 208-RQFP
Manufacturer
Altera
Series
MAX® 9000r
Datasheet

Specifications of EPM9560ARI208-10

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Logic Elements/blocks
35
Number Of Macrocells
560
Number Of Gates
12000
Number Of I /o
153
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
208-RQFP
Voltage
3.3V/5V
Memory Type
EEPROM
Number Of Logic Elements/cells
35
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-2364

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Altera Corporation
f
Figure 11. MAX 9000 JTAG Waveforms
Table 13
devices.
For detailed information on JTAG operation in MAX 9000 devices, refer to
Application Note 39 (IEEE 1149.1 (JTAG) Boundary-Scan Testing in Altera
Devices).
Captured
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
Table 13. JTAG Timing Parameters & Values for MAX 9000 Devices
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
TDI
shows the JTAG timing parameters and values for MAX 9000
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
t
JCH
t
JSZX
MAX 9000 Programmable Logic Device Family Data Sheet
t
JPZX
t
JCP
t
JSSU
t
JCL
Parameter
t
JSH
t
t
JPCO
JSCO
t
JPSU
t
t
JPH
JSXZ
100
Min
50
50
20
45
20
45
t
JPXZ
Max
25
25
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25

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