EMC2103-2-AP-TR Standard Microsystems (SMSC), EMC2103-2-AP-TR Datasheet - Page 59

• Manufacturer Part Number: EMC2103-2-AP-TR
• Description: CLOSED LOOP RPM FAN CONTROLLER
• Manufacturer: Standard Microsystems (SMSC)

RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
SMSC EMC2103
6.25
ADDR
46h
R/W
R/W
The Gain Register stores the gain terms used by the proportional and integral portions of the RPM
based Fan Speed Control Algorithm. These terms will affect the FSC closed loop acquisition,
overshoot, and settling as would be expected in a classic PID system.
The Fan Spin Up Configuration Register controls the settings of Spin Up Routine.
Bit 7 - 6 - DRIVE_FAIL_CNT[1:0] - Determines how many update cycles are used for the Drive Fail
detection function as shown in
the desired tach target.
Bit 5 - NOKICK - Determines if the Spin Up Routine will drive the fan to 100% duty cycle for 1/4 of the
programmed spin up time before driving it at the programmed level.
Fan Spin Up Configuration Register
1
0
0
1
1
1
0
0
1
1
‘0’ (default) - The Spin Up Routine will drive the PWM to 100% for 1/4 of the programmed spin up
time before reverting to the programmed spin level.
GAIND OR GAINP OR GAINI [1:0]
DRIVE_FAIL_CNT[1:0]
Configuration
Fan Spin Up
REGISTER
Table 6.39 Fan Spin Up Configuration Register
Table 6.40 DRIVE_FAIL_CNT[1:0] Bit Decode
DRIVE_FAIL
B7
_CNT [1:0]
Table 6.38 Gain Decode
0
0
1
0
1
Table
B6
DATASHEET
6.40. This circuitry determines whether the fan can be driven to
0
0
1
0
1
NOK
ICK
B5
59
Disabled - the Drive Fail detection circuitry is
disabled
16 - the Drive Fail detection circuitry will count for 16
update periods
32 - the Drive Fail detection circuitry will count for 32
update periods
64 - the Drive Fail detection circuitry will count for 64
update periods
B4
SPIN_LVL[2:0]
B3
NUMBER OF UPDATE PERIODS
B2
RESPECTIVE GAIN FACTOR
SPINUP_TIME
B1
4x (default)
[1:0]
1x
2x
8x
Revision 0.88 (06-30-08)
B0
DEFAULT
19h