R1LV0808ASB-5SI#B0 Renesas Electronics America, R1LV0808ASB-5SI#B0 Datasheet - Page 13

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R1LV0808ASB-5SI#B0

Manufacturer Part Number
R1LV0808ASB-5SI#B0
Description
Manufacturer
Renesas Electronics America
Datasheet

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R1LV0808ASB-5SI#B0R1LV0808ASB-5SI
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R1LV0808ASB –5SI, 7SI
Data Retention Characteristics
Note 1.Typical parameter indicates the value for the center of distribution at 3.0V(Ta=+25°C), and not 100% tested.
REJ03C0394-0100
Page 13 of 14
Chip select to data retention time
Operation recovery time
2.Typical parameter indicates the value for the center of distribution at 3.0V(Ta=+40°C), and not 100% tested.
3.CS2 controls address buffer, WE# buffer, CS1# Buffer, OE# buffer and Din buffer.
Data retention current
V
The other inputs levels (address, WE#, OE#, DQ) can be in the high impedance state.
If CS2 controls data retention mode, Vin levels (address, WE#, OE #, DQ) can be in the high impedance state.
CC
If CS1# controls data retention mode, CS2 must be CS2
for data retention
Parameter
Rev.0.01 2009.12.08
Symbol
I
V
CCDR
t
CDR
t
DR
R
Min.
1.5
0
5
-
-
-
-
1.2
Typ.
3
-
-
-
-
-
*2
*1
Max.
3.6
15
20
4
6
-
-
V
CC
-0.2V or 0V
Unit
ms
ns
V
A
A
A
A
Vin
(1) 0V
(2) CS1#
~+25°C
~+40°C
~+70°C
~+85°C
See retention waveform.
CS2
CS2
0V
CS2
V
CC
Vcc=3.0V, Vin
(1) 0V
(2) CS1#
V
Test conditions
0.2V .
-0.2V
CS2
CC
-0.2V,
0.2V or
CS2
V
CC
V
-0.2V
CC
-0.2V,
0.2V or
*3
0V

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