GS8162Z36BGD-200 GSI TECHNOLOGY, GS8162Z36BGD-200 Datasheet - Page 6

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GS8162Z36BGD-200

Manufacturer Part Number
GS8162Z36BGD-200
Description
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS8162Z36BGD-200

Density
18Mb
Access Time (max)
6.5ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
153.8MHz
Operating Supply Voltage (typ)
2.5/3.3V
Address Bus
19b
Package Type
FBGA
Operating Temp Range
0C to 70C
Number Of Ports
4
Supply Current
205mA
Operating Supply Voltage (min)
2.3/3V
Operating Supply Voltage (max)
2.7/3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
165
Word Size
36b
Number Of Words
512K
Lead Free Status / Rohs Status
Compliant
Rev: 1.06a 10/2009
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS8162Z18/36 119-Bump and 165-Bump BGA Pin Description
B
DQ
DQ
DQ
DQ
A
Symbol
, B
A
V
MCH
C,
D,
CKE
ADV
TMS
TDO
A,
B,
LBO
TCK
V
TDI
V
B
0
NC
CK
ZQ
ZZ
FT
E
E
E
DDQ
W
G
A
, B
, A
DD
DQP
DQP
DQP
SS
DQP
1
3
2
1
C
, B
A
B
C
D
D
Type
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
FLXDrive Output Impedance Control (Low = Low Impedance [High Drive], High = High Impedance [Low
Byte Write Enable for DQ
6/33
Address field LSBs and Address Counter Preset Inputs
Burst address counter advance enable; active high
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Must Connect High (165 BGA only)
Sleep mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
Clock Enable; active low
Chip Enable; active high
Write Enable; active low
Chip Enable; active low
Chip Enable; active low
Scan Test Mode Select
I/O and Core Ground
Scan Test Data Out
Core power supply
Scan Test Data In
Scan Test Clock
Address Inputs
Description
No Connect
A
, DQ
Drive])
B
, DQ
C
, DQ
D
I/Os; active low
GS8162Z18/36B(B/D)
© 2004, GSI Technology
BPR1999.05.18

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