X9418WV24Z-2.7 Intersil, X9418WV24Z-2.7 Datasheet

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X9418WV24Z-2.7

Manufacturer Part Number
X9418WV24Z-2.7
Description
IC XDCP DUAL 64TAP 10K 24-TSSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of X9418WV24Z-2.7

Taps
64
Resistance (ohms)
10K
Number Of Circuits
2
Temperature Coefficient
300 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X9418WV24Z-2.7
Manufacturer:
Intersil
Quantity:
31
Dual Digitally Controlled Potentiometers
(XDCP™)
FEATURES
• Two potentiometers in one package
• 2-wire serial interface
• Register oriented format
• Power supplies
• Low power CMOS
• High reliability
• 8-bytes of nonvolatile memory
• 2.5kΩ, 10kΩ resistor array
• Resolution: 64 taps each potentiometer
• 24-pin plastic DIP, 24-lead TSSOP and 24-lead
• Pb-Free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
—Direct Read/Write/Transfer Wiper Position
—Store as many as Four Positions per
—V
—V+ = 2.7V to 5.5V
—V– = -2.7V to -5.5V
—Standby current < 1µA
—Ideal for Battery Operated Applications
—Endurance–100,000 Data Changes per Bit per
—Register Data Retention–100 years
SOIC packages
Potentiometer
Register
CC
= 2.7V to 5.5V
V
V
CC
SS
®
SDA
SCL
A0
A1
A2
A3
1
WP
V+
V-
Data Sheet
Interface
Circuitry
Control
and
Data
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
1-888-INTERSIL or 1-888-468-3774
8
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
R0 R1
R2 R3
R0 R1
R2 R3
DESCRIPTION
The
potentiometers (XDCP) on a monolithic CMOS
integrated microcircuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the 2-wire
bus interface. Each potentiometer has associated with
it a volatile Wiper Counter Register (WCR) and 4
nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the
resistor array through the switches. Power up recalls
the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
October 12, 2006
Register
Counter
Register
Counter
(WCR)
X9418
(WCR)
Wiper
Wiper
All other trademarks mentioned are the property of their respective owners.
Low Noise/Low Power/2-Wire Bus
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
integrates
Resistor
XDCP1
Array
V
V
V
V
V
V
W0
L1
L0
H1
H0
W1
two
/R
/R
/R
/R
/R
/R
L1
L0
H1
H0
W0
W1
digitally
X9418
FN8194.3
controlled

Related parts for X9418WV24Z-2.7

X9418WV24Z-2.7 Summary of contents

Page 1

... Wiper Counter Register (WCR CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved X9418 Low Noise/Low Power/2-Wire Bus FN8194.3 integrates two digitally ...

Page 2

... Ordering Information PART NUMBER PART MARKING X9418WV24* X9418WV X9418WV24Z* (Note) X9418WV Z X9418WP24I-2.7 X9418WP G X9418WS24I-2.7 X9418WS G X9418WS24IZ-2.7 (Note) X9418WS ZG X9418WV24-2.7* X9418WV F X9418WV24Z-2.7* (Note) X9418WV ZF X9418WV24I-2.7 X9418WV G X9418WV24IZ-2.7 (Note) X9418WV ZG X9418YS24-2.7 X9418YS F X9418YS24Z-2.7 (Note) X9418YS ZF X9418YS24I-2.7 X9418YS G X9418YS24IZ-2.7 (Note) X9418YS ZG X9418YV24I-2.7* X9418YV G X9418YV24IZ-2.7* (Note) X9418YV ZG *Add " ...

Page 3

PIN CONFIGURATION DIP/SOIC X9418 SDA ...

Page 4

The X9418 will respond with an acknowledge after recognition of a start condition and its slave address and once again after successful receipt of the command byte. If the command is followed by a data byte the X9418 will respond ...

Page 5

Figure 2. Instruction Byte Format Register Select Instructions The four high order bits define the instruction. The next two bits (R1 and R0) select one of the four registers that acted ...

Page 6

Table 1. Instruction Set Instruction Read Wiper Counter 1 0 Register Write Wiper Counter 1 0 Register Read Data Register 1 0 Write Data Register 1 1 XFR Data Register Wiper Counter Register ...

Page 7

Figure 6. Increment/Decrement Timing Limits INC/DEC CMD Issued SCL SDA Figure 7. Acknowledge Response from Receiver SCL from Master Data Output from Transmitter Data Output from Receiver START 7 X9418 Voltage Out 1 t WRID 8 ...

Page 8

Figure 8. Detailed Potentiometer Block Diagram Serial Data Path From Interface Circuitry Register 0 Register 2 If WCR = 00[H] then WCR = 3F[H] then ...

Page 9

Wiper Counter Register, (6-Bit), Volatile WP5 WP4 WP3 WP2 (MSB) Instruction Format Notes: (1) “MACK”/”SACK”: stands for the acknowledge sent by the master/slave. (2) “A3 ~ A0”: stands for the device addresses sent by the master. ...

Page 10

XFR Wiper Counter Register (WCR) to Data Register (DR) S device type device instruction S T identifier addresses ...

Page 11

ABSOLUTE MAXIMUM RATINGS Temperature under bias .................... -65°C to +135°C Storage temperature ......................... -65°C to +150°C Voltage on SDA, SCL or any address input with respect to V ......................... -1V to +7V SS Voltage on V+ (referenced ...

Page 12

D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.) Symbol Parameter I V supply current CC1 CC (nonvolatile write supply current CC2 CC (move wiper, write, read current (standby Input leakage ...

Page 13

A.C. TEST CONDITIONS I nput pulse levels V Input rise and fall times 10ns Input and output timing level V EQUIVALENT A.C. LOAD CIRCUIT 5V 1533Ω SDA Output 100pF AC TIMING (over recommended operating conditions) Symbol f Clock frequency SCL ...

Page 14

HIGH-VOLTAGE WRITE CYCLE TIMING Symbol t High-voltage write cycle time (store instructions) WR XDCP TIMING Symbol t Wiper response time after the third (last) power supply is stable WRPO t Wiper response time after instruction issued (all load instructions) WRL ...

Page 15

XDCP Timing (for All Load Instructions) SCL SDA XDCP Timing (for Increment/Decrement Instruction) SCL Wiper Register Address SDA Write Protect and Device Address Pins Timing SCL SDA WP A0, A1 A2, A3 ...

Page 16

APPLICATIONS INFORMATION Basic Configurations of Electronic Potentiometers V R Three terminal Potentiometer; Variable voltage divider Application Circuits NONINVERTING AMPLIFIER – (1 OFFSET VOLTAGE ADJUSTMENT R ...

Page 17

Application Circuits (continued) ATTENUATOR – All -1/2 ≤ G ≤ +1/2 INVERTING AMPLIFIER – ...

Page 18

Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...

Page 19

Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α µ 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in ...

Page 20

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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