LTC1291CCN8 Linear Technology, LTC1291CCN8 Datasheet - Page 3

IC DATA ACQ SYSTEM 12BIT 8-DIP

LTC1291CCN8

Manufacturer Part Number
LTC1291CCN8
Description
IC DATA ACQ SYSTEM 12BIT 8-DIP
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS)r
Datasheet

Specifications of LTC1291CCN8

Resolution (bits)
12 b
Data Interface
Serial, Parallel
Voltage Supply Source
Single Supply
Voltage - Supply
5V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Sampling Rate (per Second)
-

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AC CHARACTERISTICS
otherwise specifications are at T
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
C
DIGITAL A D
SYMBOL
V
V
I
I
V
V
I
I
I
I
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground (unless otherwise
noted).
Note 3: V
Note 4: One LSB is equal to V
5V, 1LSB = 5V/4096 = 1.22mV.
Note 5: Linearity error is specified between the actual end points of the
A/D transfer curve. The deviation is measured from the center of the
quantization band.
Note 6: Recommended operating conditions.
apply over the full operating temperature range, otherwise specifications are at T
dis
en
hDI
hDO
WHCLK
WLCLK
f
r
suDI
suCS
WHCS
WLCS
IH
IL
OZ
SOURCE
SINK
CC
IN
IH
IL
OH
OL
CC
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
High Level Output Voltage
Low Level Output Voltage
High Z Output Leakage
Output Source Current
Output Sink Current
Positive Supply Current
= 5V, CLK = 1.0MHz unless otherwise specified.
PARAMETER
Delay Time, CS to D
Delay Time, CLK to D
Hold Time, D
Time Output Data Remains Valid after CLK
CLK High Time
CLK Low Time
D
D
Setup Time, D
Setup Time, CS before CLK
CS High Time During Conversion
CS Low Time During Data Transfer
Input Capacitance
OUT
OUT
Fall Time
Rise Time
U
IN
IN
after CLK
CC
Stable before CLK
DC
divided by 4096. For example, when V
OUT
OUT
A
Hi-Z
= 25 C. (Note 3)
ELECTRICAL C
Enabled
CONDITIONS
V
V
V
V
V
V
V
V
V
V
V
CS High
CS High Power Shutdown CLK Off
CC
CC
IN
IN
CC
CC
CC
OUT
OUT
OUT
OUT
= V
= 0V
= 5.25V
= 4.75V
= 4.75V, I
= 4.75V, I
= 4.75V, I
The
= V
= 0V, CS High
= 0V
= V
CC
CC
CC
, CS High
denotes the specifications which apply over the full operating temperature range,
OUT
OUT
OUT
= –10 A
= – 360 A
= 1.6mA
CONDITIONS
See Test Circuits
See Test Circuits
V
V
V
See Test Circuits
See Test Circuits
V
V
V
V
Analog Inputs On Channel
Analog Inputs Off Channel
Digital Inputs
CC
CC
CC
CC
CC
CC
CC
HARA TER STICS
= 5V (Note 6)
= 5V (Note 6)
= 5V (Note 6)
= 5V (Note 6)
= 5V (Note 6)
= 5V (Note 6)
= 5V (Note 6)
CC
=
Note 7: Two on-chip diodes are tied to each analog input which will
conduct for analog voltages one diode drop below GND or one diode drop
above V
analog inputs (5V) can cause this input diode to conduct, especially at
elevated temperature, and cause errors for inputs near full scale. This spec
allows 50mV forward bias of either diode. This means that as long as the
analog input does not exceed the supply voltage by more than 50mV, the
output code will be correct.
Note 8: Channel leakage current is measured after the channel selection.
Note 9: Increased leakage currents at elevated temperatures cause the
S/H to droop, therefore it is recommended that f
f
CLK
C
30kHz at 85 C and f
CC
. Be careful during testing at low V
I
A
= 25 C. (Note 3)
LTC1291B/LTC1291C/LTC1291D
CLK
The
LTC1291B/LTC1291C/LTC1291D
MIN
300
400
500
50
50
50
18
3kHz at 25 C.
denotes the specifications which
MIN
2.0
2.4
TYP
130
100
80
80
65
25
5
5
CC
TYP
– 20
4.7
4.0
20
6
5
levels (4.5V), as high level
CLK
MAX
150
200
130
50
125kHz at 125 C,
MAX
–2.5
LTC1291
0.8
2.5
0.4
– 3
12
10
3
CLK Cycles
UNITS
UNITS
1291fa
3
mA
mA
mA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
pF
V
V
A
A
V
V
V
A
A
A

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