HI7190IB Intersil, HI7190IB Datasheet - Page 14

• Manufacturer Part Number: HI7190IB
• Description: IC ADC 24BIT PROGBL SER 20-SOIC
• Manufacturer: Intersil

Specifications of HI7190IB

• Number Of Bits: 24
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 32.5mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The HI7190 offers several different modes of Self-Calibration
and System Calibration. For calibration to occur, the on-chip
microcontroller must convert the modulator output for three
different input conditions - “zero-scale,” “positive full scale,”
and “negative full scale”. With these readings, the HI7190
can null any offset errors and calculate the gain slope factor
for the transfer function of the converter. It is imperative that
the zero-scale calibration be performed before either of the
gain calibrations. However, the order of the gain calibrations
is not important.
The calibration modes are user selectable in the Control
Register by using the MD bits (MD2-MD0) as shown in
Table 4. DRDY will go low indicating that the calibration is
complete and there is valid data at the output.
Conversion Mode
For Conversion Mode operation the HI7190 converts the
differential voltage between V
switching into this mode it takes 3 conversion periods (3 x
1/f
calibration coefficients are generated when operating in
Conversion Mode as data is calibrated using the existing
calibration coefficients.
Self-Calibration Mode
Please note: Self-calibration is only valid when operating in a
gain of one. In addition, the offset and gain errors are not
reduced as with the full system calibration.
The Self-Calibration Mode is a three step process that
updates the Offset Calibration Register, the Positive Full
Scale Calibration Register, and the Negative Full Scale
Calibration Register. In this mode an internal offset
calibration is done by disconnecting the external inputs and
shorting the inputs of the PGIA together. After 3 conversion
periods the Offset Calibration Register is updated with the
value that corrects any internal offset errors.
After the offset calibration is completed, the Positive and
Negative Full Scale Calibration Registers are updated. The
inputs V
reference is applied across the modulator inputs. The
MD2
N
0
0
0
0
1
1
1
1
) for DRDY to go low and new data to be valid. No
INHI
MD1
TABLE 4. HI7190 OPERATIONAL MODES
0
0
1
1
0
0
1
1
and V
MD0
0
1
0
1
0
1
0
1
INLO
Conversion
Self Calibration (Gain of 1 only)
System Offset Calibration
System Positive Full Scale Calibration
System Negative Full Scale Calibration
System Offset/Internal Gain Calibration
(Gain of 1 only)
System Gain Calibration
Reserved
are disconnected and the external
14
INHI
OPERATIONAL MODE
and V
INLO
. From
HI7190
HI7190 then takes 3 conversion cycles to sample the data
and update the Positive Full Scale Calibration Register. Next
the polarity of the reference voltage across the modulator
input terminals is reversed and after 3 conversion cycles the
Negative Full Scale Calibration Register is updated. The
values stored in the Positive and Negative Full Scale
Calibration Registers correct for any internal gain errors in
the A/D transfer function. After 3 more conversion cycles the
DRDY line will activate signaling that the calibration is
complete and valid data is present in the Data Output
Register.
System Offset Calibration Mode
The System Offset Calibration Mode is a single step process
that allows the user to lump offset errors of external circuitry
and the internal errors of the HI7190 together and null them
out. This mode will convert the external differential signal
applied to the V
Offset Calibration Register. The user must apply the zero
point or offset voltage to the HI7190 analog inputs and allow
the signal to settle before selecting this mode. After 4
conversion periods the DRDY line will activate signaling that
the calibration is complete and valid data is present in the
Data Output Register.
System Positive Full Scale Calibration Mode
The System Positive Full Scale Calibration Mode is a single
step process that allows the user to lump gain errors of
external circuitry and the internal errors of the HI7190
together and null them out. This mode will convert the
external differential signal applied to the V
stores the converted value in the Positive Full Scale
Calibration Register. The user must apply the +Full Scale
voltage to the HI7190 analog inputs and allow the signal to
settle before selecting this mode. After 4 conversion periods
the DRDY line will activate signaling the calibration is
complete and valid data is present in the Data Output
Register.
System Negative Full Scale Calibration Mode
The System Negative Full Scale Calibration Mode is a
single-step process that allows the user to lump gain errors
of external circuitry and the internal errors of the HI7190
together and null them out. This mode will convert the
external differential signal applied to the V
stores the converted value in the Negative Full Scale
Calibration Register. The user must apply the -Full Scale
voltage to the HI7190 analog inputs and allow the signal to
settle before selecting this mode. After 4 conversion periods
the DRDY line will activate signaling the calibration is
complete and valid data is present in the Data Output
Register.
IN
inputs and then store that value in the
IN
IN
inputs and
inputs and
June 27, 2006
FN3612.10