AD7763BSVZ Analog Devices Inc, AD7763BSVZ Datasheet - Page 17

• Manufacturer Part Number: AD7763BSVZ
• Description: IC ADC 24BIT S/D 625KSPS 64-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD7763BSVZ

• Data Interface: Serial, SPI™
• Number Of Bits: 24
• Sampling Rate (per Second): 625k
• Number Of Converters: 1
• Power Dissipation (max): 955.5mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP Exposed Pad
• Resolution (bits): 24bit
• Input Channel Type: Differential
• Supply Voltage Range - Analogue: 2.375V To 2.625V, 3.15V To 5.25V, 4.75V To 5.25V
• Supply Voltage Range -: RoHS Compliant
• Sampling Rate: 625kSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

all FSO and SDI pins can be tied together and each device written
to individually by setting the appropriate address bits in the serial
32-bit word. The exception to this is when all devices can be written
to at the same time by setting the ALL bit to logic high.
Thus, if this bit is set to logic high, every device on the serial
bus accepts the data written, regardless of the address bits. This
feature is particularly attractive if, for example, four devices are
being configured with the same user-defined filter. Instead of
having to download the filter configuration four times, only one
write is required. See the Downloading a User-Defined Filter
section for further details.
Writing to AD7763 is allowed at any time, even while reading a
conversion result. Note that after writing to the devices, valid
data is not output until after the settling time for the filter has
elapsed. The DVALID status bit is asserted at this point to
indicate that the filter has settled and that valid data is available
at the output.
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READING STATUS AND OTHER REGISTERS
The AD7763 features a number of programmable registers. To
read back the contents of these registers or the status register,
the user must first write to the control register of the device,
setting a bit corresponding to the register to be read. The next
read operation then outputs the contents of the selected register
instead of a conversion result.
To ensure that the next read cycle contains the contents of the
register that has been written to, the write operation to the register
in question must be completed a minimum of 8 × t
the falling edge of DRDY , which indicates the start of the next
read cycle.
More information on the relevant bits in the control register is
provided in the Registers section.
SCO
AD7763
before