AD9225AR Analog Devices Inc, AD9225AR Datasheet - Page 9

• Manufacturer Part Number: AD9225AR
• Description: IC ADC 12BIT 25MSPS 28-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD9225AR

• Mounting Type: Surface Mount
• Rohs Status: RoHS non-compliant
• Number Of Bits: 12
• Sampling Rate (per Second): 25M
• Data Interface: Parallel
• Number Of Converters: 7
• Power Dissipation (max): 373mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Power Dissipation Pd: 383mW
• Input Channels Per Adc: 1
• No. Of Channels: 1
• Peak Reflow Compatible (260 C): No
• Sample Rate: 25MSPS
• Supply Voltage Max: 5V
• No. Of Bits: 12 Bit
• For Use With: AD9225-EB - BOARD EVAL FOR AD9225
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Rev. C
Due to the high degree of symmetry within the SHA topology, a
significant improvement in distortion performance for differen-
tial input signals with frequencies up to and beyond Nyquist can
be realized. This inherent symmetry provides excellent cancella-
tion of both common-mode distortion and noise. Also, the
required input signal voltage span is reduced by a half, which
further reduces the degree of R
on distortion.
The optimum noise and dc linearity performance for either
differential or single-ended inputs is achieved with the largest
input signal voltage span (i.e., 4 V input span) and matched
input impedance for VINA and VINB. Only a slight degrada-
tion in dc linearity performance exists between the 2 V and 4 V
input spans.
Referring to Figure 3, the differential SHA is implemented
using a switched capacitor topology. Its input impedance and its
switching effects on the input drive source should be considered
in order to maximize the converter’s performance. The combi-
nation of the pin capacitance, C
and the sampling capacitance, C
When the SHA goes into track mode, the input source must
charge or discharge the voltage stored on C
voltage. This action of charging and discharging C
over a period of time and for a given sampling frequency, f
makes the input impedance appear to have a benign resistive
component. However, if this action is analyzed within a sampling
period (i.e., T = 1/f
therefore certain precautions on the input drive source should
be observed.
The resistive component to the input impedance can be com-
puted by calculating the average charge that gets drawn by C
from the input drive source. It can be shown that if C
lowed to fully charge up to the input voltage before switches
Q
be the same as it would if there were a resistor of 1/(C
connected between the inputs. This means that the input im-
pedance is inversely proportional to the converter’s sample
rate. Since C
much larger than that of the drive source (i.e., 8 kW at f
25 MSPS).
The SHA’s input impedance over a sampling period appears as
a dynamic input impedance to the input drive source. When the
SHA goes into the track mode, the input source ideally should
provide the charging current through R
exponential manner. The requirement of exponential charging
means that the most common input source, an op amp, must
exhibit a source impedance that is both low and resistive up to
and beyond the sampling frequency.
The output impedance of an op amp can be modeled with a
series inductor and resistor. When a capacitive load is switched
onto the output of the op amp, the output will momentarily
drop due to its effective output impedance. As the output recov-
ers, ringing may occur. To remedy the situation, a series resistor
can be inserted between the op amp and the SHA input as
shown in Figure 4. The series resistance helps isolate the op
amp from the switched capacitor load.
S1
are opened, then the average current into the input would
S
is only 5 pF, this resistive component is typically
S
), the input impedance is dynamic and
ON
PIN
S
, is typically less than 5 pF.
modulation and its effects
, parasitic capacitance, C
ON
of switch Q
S
to the new input
S
, averaged
S
S
S1
f
S
is al-
S
) Ohms
in an
=
S
,
PAR
H
,
–9–
The optimum size of this resistor is dependent on several fac-
tors, which include the ADC sampling rate, the selected op
amp, and the particular application. In most applications, a
30 W to 100 W resistor is sufficient. However, some applica-
tions may require a larger resistor value to reduce the noise
bandwidth or possibly to limit the fault current in an overvolt-
age condition. Other applications may require a larger resistor
value as part of an antialiasing filter. In any case, since the THD
performance is dependent on the series resistance and the above
mentioned factors, optimizing this resistor value for a given
application is encouraged.
The source impedance driving VINA and VINB should be
matched. Failure to provide that matching will result in degra-
dation of the AD9225’s superb SNR, THD, and SFDR.
For noise sensitive applications, the very high bandwidth of the
AD9225 may be detrimental. The addition of a series resistor
and/or shunt capacitor can help limit the wideband noise at the
ADC’s input by forming a low-pass filter. Note, however, that
the combination of this series resistance with the equivalent
input capacitance of the AD9225 should be evaluated for
those time domain applications that are sensitive to the input
signal’s absolute settling time. In applications where harmonic
distortion is not a primary concern, the series resistance may be
selected in combination with the SHA’s nominal 10 pF of input
capacitance to set the filter’s 3 dB cutoff frequency.
A better method of reducing the noise bandwidth, while possi-
bly establishing a real pole for an antialiasing filter, is to add
some additional shunt capacitance between the input (i.e.,
VINA and/or VINB) and analog ground. Since this additional
shunt capacitance combines with the equivalent input capaci-
tance of the AD9225, a lower series resistance can be selected to
establish the filter’s cutoff frequency while not degrading the
distortion performance of the device. The shunt capacitance
also acts like a charge reservoir, sinking or sourcing the addi-
tional charge required by the hold capacitor, C
reducing current transients seen at the op amp’s output.
The effect of this increased capacitive load on the op amp driv-
ing the AD9225 should be evaluated. To optimize performance
when noise is the primary consideration, increase the shunt
capacitance as much as the transient response of the input signal
will allow. Increasing the capacitance too much may adversely
affect the op amp’s settling time, frequency response, and dis-
tortion performance.
Figure 4. Series Resistor Isolates Switched Capacitor
SHA Input from Op Amp. Matching Resistors Improve
SNR Performance.
V
V
CC
EE
10 F
R
S
0.1 F
R
S
VINA
VINB
VREF
SENSE
REFCOM
AD9225
H
AD9225
, and further