AD7484BSTZ Analog Devices Inc, AD7484BSTZ Datasheet - Page 13

• Manufacturer Part Number: AD7484BSTZ
• Description: IC ADC 14BIT SAR 3MSPS 48-LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD7484BSTZ

• Data Interface: Parallel
• Number Of Bits: 14
• Sampling Rate (per Second): 3M
• Number Of Converters: 1
• Power Dissipation (max): 90mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Resolution (bits): 14bit
• Sampling Rate: 3MSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Supply Voltage Range - Digital: 4.75V To 5.25V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7484CBZ - BOARD EVALUATION FOR AD7484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

At the end of conversion, the track-and-hold returns to track
mode and the acquisition time begins. The track-and-hold
acquisition time is 70 ns. Figure 15 shows the ADC during its
acquisition phase. SW2 is closed and SW1 is in Position A. The
comparator is held in a balanced condition and the sampling
capacitor acquires the signal on V
AGND
ADC TRANSFER FUNCTION
The output coding of the AD7484 is straight binary. The
designed code transitions occur midway between the successive
integer LSB values , i.e., 1/2 LSB, 3/2 LSB. The LSB size is
V
is shown in Figure 16. This transfer characteristic may be
shifted as detailed in the Offset/Overrange section.
POWER SAVING
The AD7484 uses advanced design techniques to achieve very
low power dissipation at high throughput rates. In addition to
this, the AD7484 features two power saving modes, NAP and
Standby. These modes are selected by bringing either the NAP
or STBY pin to a logic high, respectively.
When operating the AD7484 in normal fully powered mode,
the current consumption is 18 mA during conversion and the
quiescent current is 12 mA. Operating at a throughput rate of 1
MSPS, the conversion time of 300 ns contributes 27 mW to the
overall power dissipation.
For the remaining 700 ns of the cycle, the AD7484 dissipates
42 mW of power.
V
REF
IN
/16384. The nominal transfer characteristic for the AD7484
(
300
SW1
A
ns
111...111
011...111
111...110
111...000
000...010
000...001
000...000
1 /
B
μs
Figure 16. AD7484 Transfer Characteristic
) (
×
Figure 15. ADC Acquisition Phase
0V
5
0.5LSB
V
×
SW2
18
ANALOG INPUT
mA
)
IN
=
1LSB = V
COMPARATOR
.
27
+
–
mW
+V
REF
REF
/16384
– 1.5LSB
CONTROL LOGIC
CAPACITIVE
DAC
Rev. A | Page 13 of 20
Therefore, the power dissipated during each cycle is
Figure 17 shows the AD7484 conversion sequence operating in
normal mode.
In NAP mode, almost all of the internal circuitry is powered
down. In this mode, the power dissipation of the AD7484 is
reduced to 2.5 mW. When exiting NAP mode, a minimum of
300 ns when using an external reference must be waited before
initiating a conversion. This is necessary to allow the internal
circuitry to settle after power-up and for the track-and-hold to
properly acquire the analog input signal. The internal reference
cannot be used in conjunction with the NAP mode.
If the AD7484 is put into NAP mode after each conversion, the
average power dissipation will be reduced, but the throughput
rate will be limited by the power-up time. Using the AD7484
with a throughput rate of 500 kSPS while placing the part in
NAP mode after each conversion would result in average power
dissipation as follows.
The power-up phase contributes
The conversion phase contributes
While in NAP mode for the rest of the cycle, the AD7484
dissipates only 1.75 mW of power.
Thus, the power dissipated during each cycle is
CONVST
27
BUSY
9
(
(
(
(
1400
700
300
300
mW
mW
ns
ns
ns
ns
+
/
/
/
1
2
2
+
/
2
13
μs
Figure 17. Normal Mode Power Dissipation
μs
μs
42
μs
.
) (
5
) (
) (
×
mW
) (
mW
×
×
×
5
V
300ns
5
5
5
=
V
V
+
×
V
1
12
69
×
×
.
75
×
12
18
mW
mA
0
mW
.
mA
mA
5
mA
)
=
)
)
=
=
=
42
)
24
1 µ s
13
=
9
mW
mW
1
.
.
5
25
.
75
mW
700ns
mW
mW
AD7484