AD7686BRMZ Analog Devices Inc, AD7686BRMZ Datasheet - Page 15

• Manufacturer Part Number: AD7686BRMZ
• Description: IC ADC 16BIT 500KSPS 10-MSOP
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of AD7686BRMZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Bits: 16
• Sampling Rate (per Second): 500k
• Number Of Converters: 1
• Power Dissipation (max): 21.5mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP (0.118", 3.00mm Width)
• Resolution (bits): 16bit
• Input Channel Type: Pseudo Differential
• Supply Voltage Range - Analogue: 4.5V To 5.5V
• Supply Voltage Range - Digital: 1.8V To 5.8V, 2.3V To 5.8V
• Sampling Rate: 500kSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7686CBZ - BOARD EVALUATION FOR AD7686
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

DRIVER AMPLIFIER CHOICE
Although the AD7686 is easy to drive, the driver amplifier
needs to meet the following requirements:
•
•
•
Table 8. Recommended Driver Amplifiers.
Amplifier
AD8021
AD8022
OP184
AD8605,
AD8519
AD8031
The noise generated by the driver amplifier needs to be
kept as low as possible in order to preserve the SNR and
transition noise performance of the AD7686. Note that
the AD7686 has a noise much lower than most of the other
16-bit ADCs and, therefore, can be driven by a noisier
amplifier in order to meet a given system noise
specification. The noise coming from the amplifier is
filtered by the AD7686 analog input circuit 1-pole, low-
pass filter made by R
one is used. Because the typical noise of the AD7686 is
37 µV rms, the SNR degradation due to the amplifier is
where:
f
(9 MHz) or the cutoff frequency of the input filter, if
one is used.
N is the noise gain of the amplifier (for example, +1 in
buffer configuration).
e
nV/√Hz.
For ac applications, the driver should have a THD
performance commensurate with the AD7686. Figure 18
shows the THD vs. frequency that the driver should
exceed.
For multichannel multiplexed applications, the driver
amplifier and the AD7686 analog input circuit must settle a
full-scale step onto the capacitor array at a 16-bit level
(0.0015%). In the amplifier’s data sheet, settling at 0.1% to
0.01% is more commonly specified. This could differ
significantly from the settling time at a 16-bit level and
should be verified prior to driver selection.
–3dB
N
is the equivalent input noise voltage of the op amp, in
is the input bandwidth in MHz of the AD7686
AD8615
SNR
LOSS
=
Typical Application
Very low noise and high frequency
Low noise and high frequency
Low power, low noise, and low frequency
5 V single-supply, low power
Small, low power and low frequency
High frequency and low power
20log
IN
and C
⎛
⎜
⎜
⎜
⎜
⎝
37
2
IN
+
or by the external filter, if
π
2
37
f
−
3dB
(
Ne
N
)
2
⎞
⎟
⎟
⎟
⎟
⎠
Rev 0 | Page 15 of 28
VOLTAGE REFERENCE INPUT
The AD7686 voltage reference input, REF, has a dynamic input
impedance and should therefore be driven by a low impedance
source with efficient decoupling between the REF and GND
pins, as explained in the Layout section.
When REF is driven by a very low impedance source, for
example, a reference buffer using the AD8031 or the AD8605, a
10 µF (X5R, 0805 size) ceramic chip capacitor is appropriate for
optimum performance.
If an unbuffered reference voltage is used, the decoupling value
depends on the reference used. For instance, a 22 µF (X5R,
1206 size) ceramic chip capacitor is appropriate for optimum
performance using a low temperature drift ADR43x reference.
If desired, smaller reference decoupling capacitor values down
to 2.2 µF can be used with a minimal impact on performance,
especially DNL.
Regardless, there is no need for an additional lower value
ceramic decoupling capacitor (for example, 100 nF) between the
REF and GND pins.
POWER SUPPLY
The AD7686 is specified at 4.5 V to 5.5 V. It uses two power
supply pins: a core supply VDD and a digital input/output
interface supply VIO. VIO allows direct interface with any
logic between 1.8 V and VDD. To reduce the supplies needed,
the VIO and VDD can be tied together. The AD7686 is
independent of power supply sequencing between VIO and
VDD. Additionally, it is very insensitive to power supply
variations over a wide frequency range, as shown in Figure 30,
which represents PSRR over frequency.
110
100
90
80
70
60
50
40
30
1
Figure 30. PSRR vs. Frequency
10
FREQUENCY (kHz)
100
VDD =5V
1000
AD7686
10000