MAX146AEAP+ Maxim Integrated Products, MAX146AEAP+ Datasheet - Page 5

IC ADC LP 12-BIT 133KSPS 20-SSOP

MAX146AEAP+

Manufacturer Part Number
MAX146AEAP+
Description
IC ADC LP 12-BIT 133KSPS 20-SSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX146AEAP+

Number Of Bits
12
Sampling Rate (per Second)
133k
Data Interface
MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
640mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note 1: Tested at V
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
Note 3: MAX146—internal reference, offset nulled; MAX147—external reference (VREF = +2.5V), offset nulled.
Note 4: Ground “on” channel; sine wave applied to all “off” channels.
Note 5: Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: The common-mode range for the analog inputs is from AGND to V
Note 7: External load should not change during conversion for specified accuracy.
Note 8: ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Note 9: Guaranteed by design. Not subject to production testing.
Note 10: Measured as
TIMING CHARACTERISTICS
(V
(V
Acquisition Time
DIN to SCLK Setup
DIN to SCLK Hold
SCLK Fall to Output Data Valid
CS Fall to Output Enable
CS Rise to Output Disable
CS to SCLK Rise Setup
CS to SCLK Rise Hold
SCLK Pulse Width High
SCLK Pulse Width Low
SCLK Fall to SSTRB
CS Fall to SSTRB Output Enable
CS Rise to SSTRB Output Disable
SSTRB Rise to SCLK Rise
DD
DD
-0.1
-0.2
-0.3
-0.4
-0.5
0.5
0.4
0.3
0.2
0.1
= +2.7V to +3.6V (MAX146); V
= 3.0V, VREF = 2.5V, f
0
0
been calibrated.
PARAMETER
INTEGRAL NONLINEARITY
1024
DD
vs. CODE
_______________________________________________________________________________________
CODE
|
2048
V
= 2.7V; COM = 0; unipolar single-ended input mode.
FS
(2.7V) - V
SCLK
3072
= 2.0MHz, C
DD
FS
SYMBOL
t
(V
= +2.7V to +5.25V (MAX147); T
SSTRB
t
t
t
t
t
t
4096
ACQ
t
t
t
t
t
CSS
CSH
t
SDV
SCK
t
STR
DH
DO
CH
DS
DV
CL
TR
DD, MAX
LOAD
)
Figure 1
Figure 1
Figure 2
Figure 1
External clock mode only, Figure 1
External clock mode only, Figure 2
Internal clock mode only (Note 9)
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
|
.
0
2.25
+2.7V, Low-Power, 8-Channel,
= 20pF, T
2.75
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
A
3.25
MAX14_ _C/E
Figure 1
MAX14_ _M
= +25°C, unless otherwise noted.)
CONDITIONS
MAX146
MAX147
V
3.75
DD
(V)
A
Typical Operating Characteristics
= T
4.25
DD
MIN
.
4.75
to T
Serial 12-Bit ADCs
MAX
5.25
; unless otherwise noted.)
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
-60
MIN
100
100
200
200
1.5
V
20
20
0
0
0
DD
= 2.7V
MAX146
INTEGRAL NONLINEARITY
-20
vs. TEMPERATURE
TEMPERATURE (°C)
TYP
20
MAX147
60
MAX
200
240
240
240
240
240
240
100
UNITS
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
140
5

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