MAX146AEAP+ Maxim Integrated Products, MAX146AEAP+ Datasheet - Page 19

• Manufacturer Part Number: MAX146AEAP+
• Description: IC ADC LP 12-BIT 133KSPS 20-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX146AEAP+

• Number Of Bits: 12
• Sampling Rate (per Second): 133k
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 640mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 14b shows the power consumption with
external-reference compensation in fast power-down,
with one and eight channels converted. The external
4.7µF compensation requires a 200µs wait after
power-up with one dummy conversion. This graph
shows fast multi-channel conversion with the lowest
power consumption possible. Full power-down mode
may provide increased power savings in applications
where the MAX146/MAX147 are inactive for long peri-
ods of time, but where intermittent bursts of high-speed
conversions are required.
The MAX146 can be used with an internal or external
reference voltage, whereas an external reference is
required for the MAX147. An external reference can be
connected directly at VREF or at the REFADJ pin.
An internal buffer is designed to provide 2.5V at
VREF for both the MAX146 and the MAX147. The
MAX146’s internally trimmed 1.21V reference is buf-
fered with a 2.06 gain. The MAX147’s REFADJ pin is
also buffered with a 2.00 gain to scale an external 1.25V
reference at REFADJ to 2.5V at VREF.
The MAX146’s full-scale range with the internal refer-
ence is 2.5V with unipolar inputs and ±1.25V with bipo-
lar inputs. The internal reference voltage is adjustable
to ±1.5% with the circuit in Figure 16.
With both the MAX146 and MAX147, an external refer-
ence can be placed at either the input (REFADJ) or the
output (VREF) of the internal reference-buffer amplifier.
The REFADJ input impedance is typically 20kΩ for the
MAX146, and higher than 100kΩ for the MAX147. At
Figure 15. MAX146 FULLPD/FASTPD Power-Up Sequence
DIN
VREF
REFADJ
1
FULLPD
Internal and External References
1.21V
2.50V
Lowest Power at Higher Throughputs
0V
0V
0 0
______________________________________________________________________________________
Internal Reference (MAX146)
(ZEROS)
External Reference
COMPLETE CONVERSION SEQUENCE
1
+2.7V, Low-Power, 8-Channel,
τ = RC = 20kΩ x C
FASTPD
9ms WAIT
0 1
REFADJ
Figure 16. MAX146 Reference-Adjust Circuit
Table 5. Software Power-Down and
Clock Mode
Table 6. Hard-Wired Power-Down and
Internal Clock Frequency
Floating
t
STATE
BUFFER
SHDN
1
1
0
PD1
100kΩ
0
0
1
1
24kΩ
NOPD
≈ 200µs
CH1
+3.3V
Power-Down
Serial 12-Bit ADCs
1
1
DEVICE
Enabled
Enabled
MODE
PD0
1
0
1
0
1
510kΩ
FULLPD
CH7
0.047µF
COMPENSATION
REFERENCE
0 0
BUFFER
External
Internal
N/A
(ZEROS)
Fast Power-Down
Full Power-Down
DEVICE MODE
External Clock
12
Internal Clock
REFADJ
1
MAX146
FASTPD
FREQUENCY
INTERNAL
CLOCK
1.8MHz
225kHz
0 1
N/A
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