MAX1099CEAE+ Maxim Integrated Products, MAX1099CEAE+ Datasheet - Page 12

IC ADC 10BIT SERIAL 16-SSOP

MAX1099CEAE+

Manufacturer Part Number
MAX1099CEAE+
Description
IC ADC 10BIT SERIAL 16-SSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1099CEAE+

Number Of Bits
10
Sampling Rate (per Second)
900
Data Interface
MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
2.2mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Full Temp Accuracy
+/- 4 C
Digital Output - Bus Interface
Serial (3-Wire)
Digital Output - Number Of Bits
10 bit
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Output Type
Digital
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 2 shows a simplified model of the converter
input structure. Once initiated, a voltage conversion
requires 64 f
master clock. Each conversion is preceded by 13 f
periods of warm-up time, performed in twelve 4 f
period cycles, and followed by three f
load the output register. SSTRB falls at the beginning of
a conversion and rises at the end of a conversion.
Inputs IN+ and IN- charge capacitors C HOLDP and
C
that occurs during the first f
version cycle. In the second f
switches open so that charge is retained on C
and C
between IN+ and IN-. This charge is transferred to the
ADC during the third and fourth f
The reference sampling process begins in the second
conversion cycle and continues until the conversion is
complete. Sampling occurs during the second and
fourth f
reference voltage. The reference sampling requirement
10-Bit Serial-Output Temperature Sensors
with 5-Channel ADC
Figure 2. Converter Input Structure
12
HOLDN
______________________________________________________________________________________
HOLDN
CLK
, respectively, during the acquisition interval
periods to yield an effective doubling of the
REF
CLK
IN+
IN-
as a sample of the differential voltage
periods, where f
TRACK AND HOLD
CLK
Converter Operation
R IN
40k
R IN
40k
30k
R R
CLK
period of the first con-
CLK
CLK
periods.
period, the T/H
CLK
is the internal
T/H
T/H
periods to
HOLDP
CLK
CLK
C HOLDP
4pF
C HOLDN
4pF
C REF
4pF
is signal dependent and may or may not occur in every
subsequent conversion cycle.
Temperature conversion is nothing more than subtract-
ing the results of two sequential voltage conversions. The
only difference is that output registers are not loaded at
the end of the first conversion. Thus, temperature con-
versions require 2 x 64 - 3 = 125 f
3a and 3b show timing diagrams for voltage and tem-
perature conversions, respectively.
The T/H stage for the MAX1098/MAX1099 is a simple
switched-capacitor sampling operation. The time
required for the T/H stage to acquire an input signal is
a function of how fast its input capacitance is charged.
If the signal source impedance is high, the acquisition
time lengthens and more time must be allowed
between conversions. The acquisition time (t
maximum time the device takes to acquire the signal.
Calculate this with the following equation:
where R
R
IN
is the T/H input impedance (40kΩ), and C
s
is the source impedance of the input signal,
GAIN
OF 2
t
ACQ
TIMING/CONTROL
DIFFERENTIAL
= 7 (R
FULLY
LOGIC
A/D
s
+ R
IN
CLK
) C
OUTPUT
IN
periods. Figures
Track/Hold
ACQ
IN
) is the
is the

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