AD7994BRUZ-0 Analog Devices Inc, AD7994BRUZ-0 Datasheet - Page 19

• Manufacturer Part Number: AD7994BRUZ-0
• Description: IC ADC 12BIT 4CHAN I2C 16TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7994BRUZ-0

• Data Interface: I²C, Serial
• Number Of Bits: 12
• Sampling Rate (per Second): 188k
• Number Of Converters: 1
• Power Dissipation (max): 2.2mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Resolution (bits): 12bit
• Sampling Rate: 188kSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Analog: 2.7V To 5.5V
• Supply Current: 1.4mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7994CBZ - BOARD EVALUATION FOR AD7994CBZ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

CONFIGURATION REGISTER
The configuration register is an 8-bit read/write register that is used to set the operating modes of the AD7993/AD7994. The bit functions
are outlined in Table 9. A single-byte write is necessary when writing to the configuration register.
Table 9. Configuration Register Bit Function Descriptions and Default Settings at Power-Up
D7
CH4
0
Table 10. Bit Function Descriptions
Bit
D7 to D4
D3
D2
D1
D0
Table 11. Channel Selection
D7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Table 12. Alert/Busy Function
D2
0
0
1
1
D6
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D6
CH3
0
D5
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D1
0
1
0
1
Mnemonic
CH4 to CH1
FLTR
ALERT EN
BUSY/ALERT
BUSY/ALERT
POLARITY
D4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D5
CH2
0
Analog Input Channel
No channel selected; see address pointer byte, Mode 2.
Convert on V
Convert on V
Sequence between V
Convert on V
Sequence between V
Sequence between V
Sequence between V
Convert on V
Sequence between V
Sequence between V
Sequence between V
Sequence between V
Sequence between V
Sequence between V
Sequence between V
ALERT/BUSY Pin Configuration
Pin does not provide any interrupt signal.
Pin configured as a busy output.
Pin configured as an alert output.
Resets the ALERT output pin, the Alert_Flag bit in the conversion result register, and the entire alert status register
(if any is active). If 1/1 is written to Bits D2/D1 in the configuration register to reset the ALERT pin, the Alert_Flag bit,
and the alert status register, the contents of the configuration register read 1/0 for D2/D1, respectively, if read back.
Comment
These 4-channel address bits select the analog input channel(s) to be converted. A 1 in any of Bits D7 to D4
selects a channel for conversion. If more than one channel bit is set to 1, the AD7993/AD7994 sequence
through the selected channels, starting with the lowest channel. All unused channels should be set to 0.
Table 11 shows how these 4-channel address bits are decoded. Prior to initiating a conversion, the channel(s)
must be selected in the configuration register.
The value written to this bit of the control register determines whether the filtering on SDA and SCL is
enabled or is to be bypassed. If this bit is a 1, then the filtering is enabled; if it is a 0, the filtering is bypassed.
The hardware ALERT function is enabled if this bit is set to 1 and disabled if this bit is set to 0. This bit is used
in conjunction with the BUSY/ALERT bit to determine if the ALERT/BUSY pin act as an ALERT or a BUSY output
(see Table 12).
This bit is used in conjunction with the ALERT EN bit to determine if the ALERT/BUSY output, Pin 13, acts as an
ALERT or BUSY output (see Table 12), and if Pin 13 is configured as an ALERT output pin, if it is to be reset.
This bit determines the active polarity of the ALERT/BUSY pin regardless of whether it is configured as an
ALERT or BUSY output. It is active low if this bit is set to 0, and active high if it is set to 1.
D4
CH1
0
IN
IN
IN
IN
1.
2.
3.
4.
D3
FLTR
1
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
1 and V
1 and V
2 and V
1, V
1 and V
2 and V
1, V
3 and V
1, V
2, V
1, V
IN
IN
IN
IN
IN
2, and V
2, and V
3, and V
3, and V
2, V
IN
IN
IN
IN
IN
IN
IN
2.
3.
3.
4.
4.
4.
3, and V
D2
ALERT EN
0
IN
IN
IN
IN
3.
4.
4.
4.
Rev. 0 | Page 19 of 32
IN
4.
BUSY/ALERT
D1
0
Comments
The AD7993/AD7994 convert on the selected channel in
the sequence in ascending order, starting with the
lowest channel in the sequence.
D0
ALERT/BUSY POLARITY
0
AD7993/AD7994