MCP3208-BI/SL Microchip Technology, MCP3208-BI/SL Datasheet - Page 13

• Manufacturer Part Number: MCP3208-BI/SL
• Description: IC ADC 12BIT 2.7V 8CH SPI 16SOIC
• Manufacturer: Microchip Technology

Specifications of MCP3208-BI/SL

• Number Of Converters: 1
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Number Of Bits: 12
• Sampling Rate (per Second): 100k
• Data Interface: Serial, SPI™
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Architecture: SAR
• Conversion Rate: 100 KSPs
• Resolution: 12 bit
• Input Type: Voltage
• Snr: 100 dB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Package: 16SOIC N
• Sampling Rate: 100 KSPS
• Number Of Adcs: 1
• Number Of Analog Inputs: 8|4
• Digital Interface Type: Serial (4-Wire, SPI)
• Polarity Of Input Voltage: Unipolar
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

3.0
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
3.1
Digital ground connection to internal digital circuitry.
3.2
Analog ground connection to internal analog circuitry.
3.3
Analog inputs for channels 0 - 7 for the multiplexed
inputs. Each pair of channels can be programmed to be
used as two independent channels in single-ended
mode or as a single pseudo-differential input, where
one channel is IN+ and one channel is IN. See
Section 4.1, “Analog Inputs”, and Section 5.0, “Serial
Communications”, for information on programming the
channel configuration.
3.4
The SPI clock pin is used to initiate a conversion and
clock out each bit of the conversion as it takes place.
See Section 6.2, “Maintaining Minimum Clock Speed”,
for constraints on clock speed.
3.5
The SPI port serial data input pin is used to load
channel configuration data into the device.
3.6
The SPI serial data output pin is used to shift out the
results of the A/D conversion. Data will always change
on the falling edge of each clock as the conversion
takes place.
V
DGND
AGND
CH0-CH7
CLK
D
D
CS/SHDN
V
2002 Microchip Technology Inc.
DD
REF
IN
OUT
Name
CH0 - CH7
Serial Clock (CLK)
Serial Data Input (D
Serial Data Output (D
PIN DESCRIPTIONS
DGND
AGND
PIN FUNCTION TABLE
+2.7V to 5.5V Power Supply
Digital Ground
Analog Ground
Analog Inputs
Serial Clock
Serial Data In
Serial Data Out
Chip Select/Shutdown Input
Reference Voltage Input
Function
IN
)
OUT
)
3.7
The CS/SHDN pin is used to initiate communication
with the device when pulled low and will end a conver-
sion and put the device in low power standby when
pulled high. The CS/SHDN pin must be pulled high
between conversions.
4.0
The MCP3204/3208 A/D converters employ a conven-
tional SAR architecture. With this architecture, a sam-
ple is acquired on an internal sample/hold capacitor for
1.5 clock cycles starting on the fourth rising edge of the
serial clock after the start bit has been received. Fol-
lowing this sample time, the device uses the collected
charge on the internal sample/hold capacitor to pro-
duce a serial 12-bit digital output code. Conversion
rates of 100 ksps are possible on the MCP3204/3208.
See Section 6.2, “Maintaining Minimum Clock Speed”,
for information on minimum clock rates. Communica-
tion with the device is accomplished using a 4-wire SPI-
compatible interface.
4.1
The MCP3204/3208 devices offer the choice of using
the analog input channels configured as single-ended
inputs or pseudo-differential pairs. The MCP3204 can
be configured to provide two pseudo-differential input
pairs or four single-ended inputs, while the MCP3208
can be configured to provide four pseudo-differential
input pairs or eight single-ended inputs. Configuration
is done as part of the serial command before each con-
version begins. When used in the pseudo-differential
mode, each channel pair (i.e., CH0 and CH1, CH2 and
CH3 etc.) is programmed to be the IN+ and IN- inputs
as part of the command string transmitted to the
device. The IN+ input can range from IN- to (V
). The IN- input is limited to ±100 mV from the V
The IN- input can be used to cancel small signal com-
mon-mode noise which is present on both the IN+ and
IN- inputs.
When operating in the pseudo-differential mode, if the
voltage level of IN+ is equal to or less than IN-, the
resultant code will be 000h. If the voltage at IN+ is
equal to or greater than {[V
the output code will be FFFh. If the voltage level at IN-
is more than 1 LSB below V
IN+ input will have to go below V
output code. Conversely, if IN- is more than 1 LSB
above V
the IN+ input level goes above V
For the A/D converter to meet specification, the charge
holding capacitor (C
time to acquire a 12-bit accurate voltage level during
the 1.5 clock cycle sampling period. The analog input
model is shown in Figure 4-1.
SS
Chip Select/Shutdown (CS/SHDN)
DEVICE OPERATION
Analog Inputs
, then the FFFh code will not be seen unless
MCP3204/3208
SAMPLE
REF
SS
) must be given enough
, the voltage level at the
+ (IN-)] - 1 LSB}, then
REF
SS
DS21298C-page 13
level.
to see the 000h
REF
SS
+ IN-
rail.