DS1305N+ Maxim Integrated Products, DS1305N+ Datasheet - Page 8

• Manufacturer Part Number: DS1305N+
• Description: IC RTC SERIAL ALARM 16-DIP
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/Alarmr

Specifications of DS1305N+

• Memory Size: 96B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Function: Clock/Calendar/Alarm
• Rtc Memory Size: 96 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Rtc Bus Interface: Serial (3-Wire, SPI)
• Supply Current: 1.28 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS1305
AIE1 (Alarm Interrupt Enable 1) – When set to a logic 1, this bit permits the interrupt 1 request flag
(IRQF1) bit in the status register to assert
(when INTCN = 1) or to assert
(when INTCN = 0).
INT1
INT0
When the AIE1 bit is set to logic 0, the IRQF1 bit does not initiate an interrupt signal.
STATUS REGISTER (READ 10h)
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
0
0
0
0
0
0
IRQF1
IRQF0
IRQF0 (Interrupt 0 Request Flag) – A logic 1 in the interrupt request flag bit indicates that the current
time has matched the Alarm 0 registers. If the AIE0 bit is also a logic 1, the
pin goes low. IRQF0 is
INT0
cleared when the address pointer goes to any of the Alarm 0 registers during a read or write.
IRQF1 (Interrupt 1 Request Flag) – A logic 1 in the interrupt request flag bit indicates that the current
time has matched the Alarm 1 registers. This flag can be used to generate an interrupt on either
or
INT0
depending on the status of the INTCN bit in the control register. If the INTCN bit is set to a logic 1
INT1
and IRQF1 is at a logic 1 (and AIE1 bit is also a logic 1), the
pin goes low. If the INTCN bit is set
INT1
to a logic 0 and IRQF1 is at a logic 1 (and AIE1 bit is also a logic 1), the
pin goes low. IRQF1 is
INT0
cleared when the address pointer goes to any of the Alarm 1 registers during a read or write.
TRICKLE CHARGE REGISTER (READ 11H, WRITE 91H)
This register controls the trickle charge characteristics of the DS1305. The simplified schematic of Figure
3 shows the basic components of the trickle charger. The trickle-charge select (TCS) bits (bits 4–7)
control the selection of the trickle charger. To prevent accidental enabling, only a pattern of 1010 enables
the trickle charger. All other patterns disable the trickle charger. On the initial application of power, the
DS1305 powers up with the trickle charger disabled. The diode select (DS) bits (bits 2–3) select whether
one diode or two diodes are connected between V
and V
. The resistor select (RS) bits select the
CC1
CC2
resistor that is connected between V
and V
. The resistor and diodes are selected by the RS and DS
CC1
CC2
bits, as shown in Table 3.
Figure 3. PROGRAMMABLE TRICKLE CHARGER
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