DS1388Z-3+ Maxim Integrated Products, DS1388Z-3+ Datasheet - Page 13

• Manufacturer Part Number: DS1388Z-3+
• Description: IC RTC I2C W/CHARGER 8-SOIC
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/Supervisor/EEPROMr

Specifications of DS1388Z-3+

• Memory Size: 4K (512 x 8)
• Time Format: HH:MM:SS:hh (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 7: Enable Oscillator (EOSC). When set to logic 0,
the oscillator is started. When set to logic 1, the oscillator
is stopped when the DS1388 switches to battery power.
This setting can be used to conserve battery power
when timekeeping operation is not required. This bit is
cleared (logic 0) when power is first applied. When the
DS1388 is powered by V
regardless of the status of the EOSC bit. The clock can
be halted whenever the timekeeping functions are not
required, which minimizes V
Bits 6 to 2: These bits read as zero and cannot be
modified.
Bit 1: Watchdog Enable (WDE). When set to logic
one, the watchdog counter is enabled. When set to
logic 0, the watchdog counter is disabled, and the two
registers can be used as NV RAM. This bit is cleared
(logic 0) when power is first applied.
Bit 0: Watchdog Reset (WD/RST). This bit enables the
watchdog alarm output to drive the RST pin. When the
WD/RST bit is set to logic 1, RST pulses low for t
WDE = 1 and the watchdog counter reaches zero.
When the WD/RST bit is set to logic 0, the RST pin is
not driven by the watchdog alarm; only the watchdog
flag bit (WF) in the flag register is set to logic 1. This bit
is logic 0 when power is first applied.
The simplified schematic of Figure 5 shows the basic
components of the trickle charger. The trickle-charge
Table 3. Trickle-Charge Register
TCS3
X
X
X
1
1
1
1
1
1
0
EOSC
BIT 7
TCS2
X
X
X
0
0
0
0
0
0
0
Trickle-Charge Register (00Ah)
I
BIT 6
2
0
TCS1
C RTC/Supervisor with Trickle Charger
X
X
X
1
1
1
1
1
1
0
Control Register (00Ch)
CC
BAT
, the oscillator is always on
TCS0
current (I
X
X
X
0
0
0
0
0
0
0
BIT 5
0
____________________________________________________________________
BACKUPDR
DS1
X
0
1
0
1
0
1
0
1
0
BIT 4
RST
0
DS0
).
0
1
X
1
0
1
0
1
0
0
if
ROUT1
and 512 Bytes EEPROM
select (TCS) bits (bits 4–7) control the selection of the
trickle charger. To prevent accidental enabling, only a
pattern on 1010 enables the trickle charger. All other
patterns disable it. The trickle charger is disabled when
power is first applied. The diode-select (DS) bits (bits 2
and 3) select whether or not a diode is connected
between V
selected, yet if DS is 10, a diode is selected. The ROUT
bits (bits 0 and 1) select the value of the resistor con-
nected between V
resistor selected by the resistor select (ROUT) bits and
the diode selected by the diode-select (DS) bits.
Warning: The ROUT value of 250Ω must not be select-
ed whenever V
The user determines the diode and resistor selection
according to the maximum current desired for battery
or super cap charging. The maximum charging current
can be calculated as illustrated in the following exam-
ple. Assume that a system power supply of 3.3V is
applied to V
V
been enabled with a diode and resistor R2 between
V
be calculated as follows:
As the super cap charges, the voltage drop between
V
current decreases.
X
X
I
0
0
0
1
1
1
1
0
BACKUP
CC
CC
MAX
BIT 3
0
and V
and V
= (3.3V - diode drop) / R2 ≈ (3.3V - 0.7V) / 2kΩ ≈
ROUT0
. Also, assume that the trickle charger has
X
X
0
1
1
0
0
1
1
0
BACKUP
CC
BACKUP
CC
and V
CC
Disabled
Disabled
Disabled
No diode, 250Ω resistor
One diode, 250Ω resistor
No diode, 2kΩ resistor
One diode, 2kΩ resistor
No diode, 4kΩ resistor
One diode, 4kΩ resistor
Initial default value—disabled
BIT 2
Control Register (00Ch)
and a super cap is connected to
CC
is greater than 3.63V.
0
. The maximum current I
decreases and therefore the charge
BACKUP
and V
1.3mA
BACKUP
. If DS is 01, no diode is
FUNCTION
BIT 1
WDE
. Table 3 shows the
MAX
WD/RST
BIT 0
would
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