DS1023S-25+ Maxim Integrated Products, DS1023S-25+ Datasheet - Page 14

• Manufacturer Part Number: DS1023S-25+
• Description: IC DELAY PROG 8BIT 0.25NS 16SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS1023S-25+

• Number Of Taps/steps: 256
• Function: 1-Shot
• Delay To 1st Tap: 16.5nS
• Tap Increment: 0.25nS
• Available Total Delays: 63.75ns
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Propagation Delay Time: 0.25 ns
• Supply Voltage (min): 4.75 V
• Operating Temperature Range: 0 C to + 70 C
• High Level Output Current: - 1 mA
• Interface: Serial, Parallel
• Logic Type: CMOS, TTL
• Low Level Output Current: 8 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.25 V
• No. Of Taps: 256
• Delay Time Per Tap: 250ns
• Total Delay Time: 63.75ns
• Supply Voltage Range: 4.75V To 5.25V
• Digital Ic Case Style: SOIC
• No. Of Pins: 16
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Independent Delays: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading edge.
t
input pulse.
t
input pulse.
t
point on the corresponding edge of the output pulse.
TIMING DIAGRAM: NON-LATCHED PARALLEL MODE
(
TIMING DIAGRAM: LATCHED PARALLEL MODE (
WI
RISE
FALL
D
P
(Time Delay): The elapsed time between the 1.5V point on the edge of an input pulse and the 1.5V
/S = 0, LE = 1) Figure 10
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the 1.5V
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
14 of 16
P
/S = 0) Figure 11