CY28442ZXC Cypress Semiconductor Corp, CY28442ZXC Datasheet - Page 17

IC CLOCK GEN ALVISO 56-TSSOP

CY28442ZXC

Manufacturer Part Number
CY28442ZXC
Description
IC CLOCK GEN ALVISO 56-TSSOP
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Distribution, Spread Spectrum Clock Generatorr
Datasheet

Specifications of CY28442ZXC

Pll
Yes with Bypass
Input
LVTTL, Crystal
Output
Clock
Number Of Circuits
1
Ratio - Input:output
11:15
Differential - Input:output
No/Yes
Frequency - Max
200MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP II
Frequency-max
100MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY28442ZXC
Quantity:
305
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Manufacturer:
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Quantity:
20 000
Part Number:
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Manufacturer:
TI
Quantity:
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Part Number:
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Manufacturer:
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Quantity:
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Document #: 38-07680 Rev. **
AC Electrical Specifications
Crystal
T
T
T
T
L
CPU at 0.7V
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
∆T
∆T
V
V
V
DC
PERIOD
R
CCJ
ACC
DC
PERIOD
PERIOD
PERIOD
PERIOD
PERIODSS
PERIODSS
PERIODSS
PERIODSS
PERIODAbs
PERIODAbs
PERIODAbs
PERIODAbs
PERIODSSAbs
PERIODSSAbs
PERIODSSAbs
PERIODSSAbs
CCJ
CCJ2
SKEW2
R
RFM
HIGH
LOW
OX
Parameter
R
F
/ T
/ T
F
F
XIN Duty Cycle
XIN Period
XIN Rise and Fall Times
XIN Cycle to Cycle Jitter
Long-term Accuracy
CPUT and CPUC Duty Cycle
100-MHz CPUT and CPUC Period
133-MHz CPUT and CPUC Period
166-MHz CPUT and CPUC Period
200-MHz CPUT and CPUC Period
100-MHz CPUT and CPUC Period, SSC Measured at crossing point V
133-MHz CPUT and CPUC Period, SSC Measured at crossing point V
166-MHz CPUT and CPUC Period, SSC Measured at crossing point V
200-MHz CPUT and CPUC Period, SSC Measured at crossing point V
100-MHz CPUT and CPUC Absolute
period
133-MHz CPUT and CPUC Absolute
period
166-MHz CPUT and CPUC Absolute
period
200-MHz CPUT and CPUC Absolute
period
100-MHz CPUT and CPUC Absolute
period, SSC
133-MHz CPUT and CPUC Absolute
period, SSC
166-MHz CPUT and CPUC Absolute
period, SSC
200-MHz CPUT and CPUC Absolute
period, SSC
CPUT/C Cycle to Cycle Jitter
CPU2_ITP Cycle to Cycle Jitter
CPU2_ITP to CPU0 Clock Skew
CPUT and CPUC Rise and Fall Time
Rise/Fall Matching
Rise Time Variation
Fall Time Variation
Voltage High
Voltage Low
Crossing Point Voltage at 0.7V Swing
Description
ADVANCE INFORMATION
The device will operate reliably with input
duty cycles up to 30/70 but the REF clock
duty cycle will not be within specification
When XIN is driven from an external
clock source
Measured between 0.3V
As an average over 1-µs duration
Over 150 ms
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured at crossing point V
Measured from V
0.525V
Determined as a fraction of 2*(T
T
Math averages Figure 15
Math averages Figure 15
F
)/(T
R
+ T
F
)
Condition
OL
= 0.175 to V
DD
and 0.7V
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
OX
R
OH
=
DD
9.997001
7.497751
5.998201
4.998500
9.997001
7.497751
5.998201
4.998500
9.912001
7.412751
5.913201
4.913500
9.912001
7.412751
5.913201
4.913500
69.841
–150
Min.
47.5
175
660
250
45
10.00300
7.502251
6.001801
5.001500
10.05327
7.539950
6.031960
5.026634
10.08800
7.587251
6.086801
5.086500
10.13827
7.624950
6.116960
5.111634
CY28442
Page 17 of 22
Max.
52.5
71.0
10.0
500
300
125
150
700
125
125
850
550
55
85
20
Unit
ppm
mV
mV
mV
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps
%
%
%
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