MPC9608AC IDT, Integrated Device Technology Inc, MPC9608AC Datasheet

MPC9608AC

Manufacturer Part Number

MPC9608AC

Description

IC CLOCK BUFFER ZD 1:10 32-LQFP

Manufacturer

IDT, Integrated Device Technology Inc

Type

Zero Delay Bufferr

Datasheet

1.MPC9608ACR2.pdf (10 pages)

Specifications of MPC9608AC

Pll

Yes with Bypass

Input

LVCMOS

Output

LVCMOS

Number Of Circuits

Ratio - Input:output

1:10

Differential - Input:output

No/No

Frequency - Max

200MHz

Divider/multiplier

Yes/No

Voltage - Supply

3.135 V ~ 3.465 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

32-LQFP

Frequency-max

200MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

MPC9608AC

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

Company:

BOSTOCK HK LIMITED

Part Number:

MPC9608ACR2

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

Current page: 1 of 10
Download datasheet (379Kb)

IDT™ 1:10 LVCMOS Zero Delay Clock Buffer

Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc

1:10 LVCMOS Zero Delay Clock

Buffer

Freescale Semiconductor, Inc.

TECHNICAL DATA

1:10 LVCMOS Zero Delay

Clock Buffer

a very wide frequency range and low output skews the MPC9608 is targeted for

high performance and mid-range clock tree designs.

Features

• 1:10 outputs LVCMOS zero-delay buffer

• Single 3.3 V supply

• Supports a clock I/O frequency range of 12.5 to 200 MHz

• Selectable divide-by-two for one output bank

• Synchronous output enable control (CLK_STOP)

• Output tristate control (output high impedance)

• PLL bypass mode for low frequency system test purpose

• Supports networking, telecommunications and computer applications

• Supports a variety of microprocessors and controllers

• Compatible to PowerQuicc I and II

• Ambient Temperature Range -40°C to +85°C

• 32-lead Pb-free Package Available

Functional Description

its low-skew clock output phase to the reference clock phase, providing virtually

zero propagation delay. This enables nested clock designs with near-zero

insertion delay. Designs using the MPC9608 as PLL fanout buffer will show

significantly lower clock skew than clock distributions developed from traditional fanout buffers. The device offers one reference clock

input and two banks of 5 outputs for clock fanout. The input frequency and phase is reproduced by the PLL and provided at the

outputs. A selectable frequency divider sets the bank B outputs to generate either an identical copy of the bank A clocks or one half

of the bank A clock frequency. Both output banks remain synchronized to the input reference for both bank B configurations.

the MPC9608 outputs can also be set to high-impedance state by connecting

a PLL bypass mode for low frequency test purpose. In PLL bypass mode, the minimum frequency and static phase offset specification

do not apply.

losing lock.

nals while the outputs provide LVCMOS compatible levels with the capability to drive terminated 50 Ω transmission lines on the inci-

dent edge. For series terminated transmission lines, each of the MPC9608 outputs can drive one or two traces giving the devices an

effective fanout of 1:20. The device is packaged in a 7x7 mm

474

The MPC9608 is a 3.3 V compatible, 1:10 PLL based zero-delay buffer. With

The MPC9608 uses an internal PLL and an external feedback path to lock

Outputs are only disabled or enabled when the outputs are already in logic low state (CLK_STOP). For system test and diagnosis,

CLK_STOP and

The MPC9608 is fully 3.3 V compatible and requires no external components for the internal PLL. All inputs accept LVCMOS sig-

do not affect the PLL feedback output (QFB) and down stream clocks can be disabled without the internal PLL

FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA

32-lead LQFP package.

to logic high level. Additionally, the device provides

LVCMOS 1:10 ZERO-DELAY

32-LEAD LQFP PACKAGE

LOW VOLTAGE 3.3 V

MPC9608

CLOCK BUFFER

CASE 873A-03

FA SUFFIX

AC SUFFIX

Order number: MPC9608

DATA SHEET

Rev 3, 08/2004

MPC9608

Related parts for MPC9608AC

MPC9608AC Summary of contents

Page 1

Freescale Semiconductor, Inc. TECHNICAL DATA 1:10 LVCMOS Zero Delay Clock 1:10 LVCMOS Zero Delay Buffer Clock Buffer The MPC9608 is a 3.3 V compatible, 1:10 PLL based zero-delay buffer. With a very wide frequency range and low output skews the ...

Page 2

MPC9608 1:10 LVCMOS Zero Delay Clock Buffer Ref CCLK 25k FB FB_IN 25k F_RANGE[0:1] 25k PLL_EN 25k CLK_STOP 25k BSEL 25k OE 25k V QA4 QA3 QA2 GND QA1 QA0 V IDT™ 1:10 LVCMOS Zero Delay Clock Buffer FREESCALE SEMICONDUCTOR ...

Page 3

MPC9608 1:10 LVCMOS Zero Delay Clock Buffer MPC9608 Table 1. Pin Configuration Pin I/O Type CCLK Input LVCMOS FB_IN Input LVCMOS F_RANGE[0:1] Input LVCMOS BSEL Input LVCMOS PLL_EN Input LVCMOS OE Input LVCMOS CLK_STOP Input LVCMOS QA0-4, QB0-4 Output LVCMOS ...

Page 4

MPC9608 1:10 LVCMOS Zero Delay Clock Buffer Table 4. General Specifications Symbol Characteristics V Output termination voltage TT MM ESD protection (Machine model) HBM ESD protection (Human body model) LU Latch-up immunity C Power dissipation capacitance PD C Input capacitance ...

Page 5

MPC9608 1:10 LVCMOS Zero Delay Clock Buffer MPC9608 Table 7. AC Characteristics (V CC Symbol Characteristics f Input reference frequency in PLL mode REF Input reference frequency in PLL bypass mode 4 f Output Frequency max t Reference Input Pulse ...

Page 6

MPC9608 1:10 LVCMOS Zero Delay Clock Buffer Power Supply Filtering The MPC9608 is a mixed analog/digital product. Its analog circuitry is naturally susceptible to random noise, especially if this noise is seen on the power supply pins. Random noise on ...

Page 7

MPC9608 1:10 LVCMOS Zero Delay Clock Buffer MPC9608 Due to the statistical nature of I/O jitter, an RMS value (1 σ) is specified. I/O jitter numbers for other confidence factors (CF) can be derived from Table 8. Table 8. Confidence ...

Page 8

MPC9608 1:10 LVCMOS Zero Delay Clock Buffer 3.0 OutA t = 3.8956 OutB D 2 3.9386 D 2.0 In 1.5 1.0 0 TIME (nS) Figure 6. Single versus Dual Waveforms Since this step ...

Page 9

MPC9608 1:10 LVCMOS Zero Delay Clock Buffer MPC9608 t SK(O) The pin-to-pin skew is defined as the worst case difference in propagation delay between any similar delay path within a single device. Figure 9. Output-to-Output Skew ...

Page 10

MPC9608 PART NUMBERS 1:10 LVCMOS Zero Delay Clock Buffer INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek ...

Related keywords

mpc9653a
mpc9608
mpc961p
mpc961c
mpc9608ac
mpc9600ae
mpc9608fa
mpc9600fa
MPC9608AC datasheet
MPC9608AC data sheet
MPC9608AC pdf datasheet
MPC9608AC component
MPC9608AC part
MPC9608AC distributor
MPC9608AC RoHS
MPC9608AC datasheet download