MPC961C Motorola, MPC961C Datasheet

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MPC961C

Manufacturer Part Number
MPC961C
Description
LOW VOLTAGE ZERO DELAY
Manufacturer
Motorola
Datasheet

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Low Voltage Zero Delay
Buffer
buffer. With output frequencies of up to 200MHz, output skews of 150ps
the device meets the needs of the most demanding clock tree
applications.
MPC961C offers an LVCMOS reference clock while the MPC961P offers
an LVPECL reference clock.
into a high impedance state. Because the OE pin does not affect the QFB
output, down stream clocks can be disabled without the internal PLL
losing lock.
loop filter components. All control inputs accept LVCMOS compatible
levels and the outputs provide low impedance LVCMOS outputs capable
of driving terminated 50
the MPC961 can drive two lines per output giving the device an effective
fanout of 1:36. The device is packaged in a 32 lead LQFP.
03/01
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 2001
Fully Integrated PLL
Up to 200MHz I/O Frequency
LVCMOS Outputs
Outputs Disable in High Impedance
LVCMOS Reference Clock Options
LQFP Packaging
150ps Output Skews
The MPC961 is a 2.5V or 3.3V compatible, 1:18 PLL based zero delay
The MPC961 is offered with two different input configurations. The
When pulled high the OE pin will force all of the outputs (except QFB)
The MPC961 is fully 2.5V or 3.3V compatible and requires no external
50ps Cycle–Cycle Jitter
F_RANGE
FB_IN
CCLK
OE
The MPC961C requires an external RC filter for the analog power supply pin V CCA . Please see applications section for details.
W
transmission lines. For series terminated lines
Freescale Semiconductor, Inc.
50k
50k
50k
50k
For More Information On This Product,
1
Figure 1. MPC961C Logic Diagram
Ref
FB
100 – 200 MHz
Go to: www.freescale.com
50 – 100 MHz
PLL
O
1
REV 1
ZERO DELAY BUFFER
32–LEAD LQFP PACKAGE
MPC961C
LOW VOLTAGE
CASE 873A–02
FA SUFFIX
Q0
Q1
Q2
Q3
Q14
Q15
Q16
QFB
Order this document
by MPC961C/D

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MPC961C Summary of contents

Page 1

... MPC961 can drive two lines per output giving the device an effective fanout of 1:36. The device is packaged lead LQFP. CCLK FB_IN F_RANGE OE The MPC961C requires an external RC filter for the analog power supply pin V CCA . Please see applications section for details. 03/01 Motorola, Inc. 2001 Freescale Semiconductor, Inc. PLL Ref 100 – ...

Page 2

... PLL feedback signal output, connect to a FB_IN Ground Negative power supply VCC PLL positive power supply (analog power supply). The MPC961C requires an external RC filter for the analog power supply pin V CCA . Please see ap- plications section for details. VCC Positive power supply for I/O and core ...

Page 3

... Maximum Quiescent Supply Current V TT Output Termination Voltage a. The MPC961C is capable of driving 50 transmission lines on the incident edge. Each output drives one 50 parallel terminated transmission line to a termination voltage Alternatively, the device drives up two 50 series terminated transmission lines. Table 5: AC CHARACTERISTICS ( 3.3V ...

Page 4

... Maximum Quiescent Supply Current V TT Output Termination Voltage a. The MPC961C is capable of driving 50 transmission lines on the incident edge. Each output drives one 50 parallel terminated transmission line to a termination voltage Alternatively, the device drives up two 50 series terminated transmission lines. Table 7: AC CHARACTERISTICS ( 2.5V ...

Page 5

... DC voltage drop that will be seen between the V CC supply and the V CCA pin of the MPC961C. From the data sheet the I CCA current (the current sourced through the V CCA pin) is typically 2mA (5mA maximum), assuming that a minimum of 2.375V ( ...

Page 6

... CMOS fanout buffers. The external feedback option of the MPC961C clock driver allows for its use as a zero delay buffer. By using the QFB output as a feedback to the PLL the propagation delay through the device is virtually eliminated. ...

Page 7

... Increased power consumption will increase the die junction temperature and impact the device reliability (MTBF). According to the system-defined tolerable MTBF, the die junction temperature of the MPC961C needs to be controlled and the thermal impedance of the board/package should be optimized. The power dissipated in the MPC961C is represented in equation 1 ...

Page 8

... Figure 9. Maximum MPC961C frequency 3.3V, MTBF 9.1 years, driving series terminated transmission lines Pulse Generator Figure 11. TCLK MPC961C AC test reference for 3.3V and 2.5V MOTOROLA Freescale Semiconductor, Inc. T J,MAX should be selected according to the MTBF system requirements and Table 9. R thja can be derived from Table 10. ...

Page 9

... For More Information On This Product to: www.freescale.com Figure 13. Propagation delay ( static phase offset) test reference CCLK FB_IN T JIT ) = |T 0 –T 1 mean| Figure 15. I/O Jitter T JIT(PER –1 Figure 17. Period Jitter MPC961C GND GND MOTOROLA ...

Page 10

... MPC961C –T– B www.DataSheet4U.com –AB– SEATING –AC– PLANE DETAIL AD MOTOROLA Freescale Semiconductor, Inc. OUTLINE DIMENSIONS FA SUFFIX LQFP PACKAGE CASE 873A–02 ISSUE 0.20 (0.008) AB T– –U– V DETAIL –Z– ...

Page 11

... TIMING SOLUTIONS DL207 — Rev 0 Freescale Semiconductor, Inc. NOTES For More Information On This Product to: www.freescale.com MPC961C MOTOROLA ...

Page 12

... Minami–Azabu. Minato–ku, Tokyo 106–8573 Japan. 81–3–3440–3569 ASIA / PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 852–26668334 For More Information On This Product to: www.freescale.com TIMING SOLUTIONS MPC961C/D DL207 — Rev 0 ...

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