ICS950201AGLF IDT, Integrated Device Technology Inc, ICS950201AGLF Datasheet - Page 5

• Manufacturer Part Number: ICS950201AGLF
• Description: IC TIMING CTRL HUB P4 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Timing Control Hubr

Specifications of ICS950201AGLF

• Input: Crystal
• Output: Clock
• Frequency - Max: 200MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1972-5; 950201AGLF; ICS950201AGLF

Notes:
1.
2.
3.
4.
5.
6.
IDT
ICS950201
Programmable Timing Control Hub
Dummy Command Code
TM
Dummy Byte Count
Programmable Timing Control Hub
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends a dummy command code
• ICS clock will acknowledge
• Controller (host) sends a dummy byte count
• ICS clock will acknowledge
• Controller (host) starts sending first byte (Byte 0)
• ICS clock will acknowledge each byte one at a
time .
• Controller (host) sends a Stop bit
Controller (Host)
The ICS clock generator is a slave/receiver, I
verification. Read-Back will support Intel PIIX4 "Block-Read" protocol.
The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode)
The input is operating at 3.3V logic levels.
The data byte format is 8 bit bytes.
To simplify the clock generator I
must be accessed in sequential order from lowest to highest byte with the ability to stop after any complete byte has
been transferred. The Command code and Byte count shown above must be sent, but the data is ignored for those two
bytes. The data is loaded until a Stop sequence is issued.
At power-on, all registers are set to a default condition, as shown.
through byte 5
Address
Start Bit
Stop Bit
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
D2
(H )
How to Write:
For more information, contact IDT for an I
The information in this section assumes familiarity with I
ICS (Slave/Receiver)
General I
TM
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
for P4
TM
2
C interface, the protocol is set to use only "Block-Writes" from the controller. The bytes
for P4
TM
TM
2
C serial interface information
2
(H)
C component. It can read back the data stored in the latches for
5
2
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the read address D3
• ICS clock will acknowledge
• ICS clock will send the byte count
• Controller (host) acknowledges
• ICS clock sends first byte (Byte 0) through byte 6
• Controller (host) will need to acknowledge each byte
• Controller (host) will send a stop bit
C programming application note.
Controller (Host)
Address
Start Bit
Stop Bit
D3
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
(H )
How to Read:
2
C programming.
ICS (Slave/Receiver)
Byte Count
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
ACK
460J—01/25/10
(H)