MAX3872ETJ+ Maxim Integrated Products, MAX3872ETJ+ Datasheet - Page 10

• Manufacturer Part Number: MAX3872ETJ+
• Description: IC DATA RECOVERY W/AMP 32-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Clock and Data Recovery (CDR)r

Specifications of MAX3872ETJ+

• Input: CML
• Output: CML
• Frequency - Max: 2.67GHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Frequency-max: 2.67GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX3872 is designed for regenerator and receiver
applications. Its fully integrated PLL is a classic 2nd-order
feedback system, with a jitter transfer bandwidth (J
below 2.0MHz. The external capacitor (C
from FIL to VCC_VCO sets the PLL loop damping. Note
that the PLL jitter transfer bandwidth does not change as
C
loop stability are affected. Figures 6 and 7 show the
open-loop and closed-loop transfer functions.
The PLL zero frequency, f
capacitor C
For an overdamped system (f
peaking (J
ed by:
where J
data rate.
The recommended value of C
a maximum jitter peaking of less than 0.1dB for all data
rates. Decreasing C
decreases acquisition time, with the tradeoff of increased
peaking. For data rates greater than OC-3, C
less than 0.82µF and still meet the jitter-peaking specifi-
cation.
Multirate Clock and Data Recovery
with Limiting Amplifier
Table 3. Holdover Frequency Settings
10
REFERENCE CLOCK FREQUENCY (MHz)
FIL
changes, but the jitter peaking, acquisition time, and
______________________________________________________________________________________
BW
P
FIL
) of a 2nd-order system can be approximat-
is the jitter transfer bandwidth for a given
155.52/156.25
155.52/156.25
, and can be approximated according to:
622.08/625
622.08/625
J
666.51
666.51
666.51
622.08
622.08
166.63
166.63
166.63
155.52
155.52
P
f
Z
=
FIL
=
20
2 650
π(
log
from the recommended value
Setting the Loop Filter
⎛
⎜
⎝
Z
1
FIL
, is a function of external
1
+
Ω
Z
)
J
= 0.82µF is to guarantee
/ J
C
BW
f
Z
FIL
BW
⎞
⎟
⎠
< 0.25), the jitter
FIL
) connected
SCLKO FREQUENCY
FIL
2.488GHz/2.5GHz
2.488GHz/2.5GHz
1.244/1.25GHz
1.244/1.25GHz
can be
666.51MHz
166.63MHz
622.08MHz
155.52MHz
666.51MHz
166.63MHz
622.08MHz
155.52MHz
2.667GHz
2.67GHz
BW
)
Excessive reduction of C
C
X7R or better.
Figure 6. Open-Loop Transfer Function
Figure 7. Closed-Loop Transfer Function
FIL
must be a low-TC, high-quality capacitor of type
H
O
(j2πf) (dB)
RS1
H(j2πf) (dB)
-3
1
0
1
0
0
0
1
0
1
0
0
1
0
1
0
C
FIL
f
Z
= 0.82μF
= 299Hz
DATA RATE: 2.488Gbps
1
1
RS2
10
FIL
DATA RATE: 2.488Gbps
10
0
1
0
1
0
1
0
0
1
0
1
0
1
0
C
might cause PLL instability.
C
f
FIL
100
Z
FIL
= 24.5kHz
= 0.82μF
= 0.01μF
100
RATESET
1000
C
FIL
= 0.01μF
1000
1
1
1
0
0
0
0
1
1
1
0
0
0
0
f (kHz)
f (kHz)
FREFSET
0
0
0
0
0
0
0
1
1
1
1
1
1
1