CY7C65640A-LFC Cypress Semiconductor Corp, CY7C65640A-LFC Datasheet - Page 23

• Manufacturer Part Number: CY7C65640A-LFC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C65640A-LFC

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Not Compliant

Document History Page
Document #: 38-08019 Rev. *M
Document Title: CY7C65640A TetraHub™ High Speed USB Hub Controller
Document Number: 38-08019
Rev.
*C
*D
*G
*H
*M
*A
*B
*E
*F
*K
*J
*L
**
*I
ECN No.
2657415
2742387
2766203
2825358
121793
125275
234272
285171
308296
390258
522224
113506
116812
118518
Submission
see ECN
see ECN
see ECN
see ECN
see ECN
04/25/02
08/15/02
10/31/02
12/09/02
04/02/03
02/10/09
07/22/09
09/18/09
12/10/09
Date
RSKV/PYRS Added Contents. Added ‘Pb-free Package‘ for Sawn parts in the
DPT/PYRS Added package diagram spec 51-85187, updated package diagram spec
Change
Orig. of
MON
MON
MON
MON
MON
BHA
KKU
KKU
KKU
TEH
DPT
DPT
Changed CY7C65640 to CY7C65640A and reformatted to new format
Added reset period under AC characteristics.
Updated 56 QFN (sawn) package drawing
Updated 56-Pin Sawn QFN package (FIgure 8)
New Data Sheet (preliminary)
Supply voltage range changed from 3.3V–3.6V to 3.15V–3.45
Added EPROM types that can be used with HX2 (p. 14)
Added description of bit 7 of Byte 12 (Illegal Hub Descriptor) D2 Load (p. 15)
Added high speed sensitivity level of receiver (p. 20)
Added QFN package design notes (section 16.1)
Fixed the Spec field in the Default Device Descriptor section 7.1
Fixed Interface Protocol field of the interface descriptor, section 7.3
Fixed Device Protocol field of the interface descriptor, section 7.7
Modified table 9-2, section 9.2
Added table 9-4, 9-5, section 9.2
Added table 4-1, 4-2, section 4.8
Added information on bits in wHubCharacterestics, section 7.8
Modified figure 16-1 in QFN package design notes, section 16.1
Included the eye diagram, section 14.4.2
Preliminary to Final
Fixed the SPI clock Frequency to 250 KHz, section 14.4.1
Added information on the configuration of unused port pins, section 6.0
Added statement that no special power up procedure is required, section 6.0
Changed the name of Bit 3 of Byte 12 of EEPROM for a 0xD2 load (section 8.2)
from BusPowered to Reserved.
Removed all indication to the misconception that the hub can support bus power.
Added information as to which nibble of byte 8 in the EEPROM defines the active
ports and which nibble defines the removable ports, section 8.2.
Added further information on the BUSPOWER pin (pin 26) functionality in section
6.0.
Added part number for the lead free package (CY7C65640-LFXC), section 15.0
Changed the name of Bit 6 of Byte 12 of EEPROM for a 0xD2 load from
CompoundDevice to Unused, section 8.2.
Removed compound device from features list.
Updated section 7.1 DID from 0x0007 to 0x000B for rev E silicon.
Added theta thermal coefficient junction to ambient (T
Corrected typo in table 6-1. Changed downstream port 4 signal labels from [3] to
[4]. Updated package diagram. Updated to new template.
51-85144 and updated Ordering Information table
mation
table.
Description of Change
JA
) to section 14.3
CY7C65640A
Ordering Infor-
Page 23 of 24
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