NBSG111BAG ON Semiconductor, NBSG111BAG Datasheet

NBSG111BAG

Manufacturer Part Number

NBSG111BAG

Description

Manufacturer

ON Semiconductor

Type

Clock Driverr

Datasheet

1.NBSG111BAG.pdf (11 pages)

Specifications of NBSG111BAG

Number Of Clock Inputs

Mode Of Operation

Differential

Output Logic Level

ECL

Operating Supply Voltage (min)

-2.375/2.375V

Operating Supply Voltage (typ)

-2.5/-3.3/2.5/3.3V

Operating Supply Voltage (max)

-3.465/3.465V

Operating Temperature Classification

Commercial

Mounting

Surface Mount

Lead Free Status / RoHS Status

Compliant

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NBSG111

2.5V/3.3V SiGe Differential

1:10 Clock/Data Driver

with RSECL* Outputs

*Reduced Swing ECL

Description

device is functionally equivalent to the LVEP111 device with much

higher bandwidth and lower EMI capabilities.

pad) and accept NECL (Negative ECL), PECL (Positive ECL),

LVTTL, LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced

Swing ECL), 400 mV.

(EN/EN) pin. The synchronous enable pin is used to avoid a runt clock

pulse when the device is enabled/disabled as can happen with an

asynchronous control. The internal flip flop is clocked on the falling

edge of selected clock (CLK0/CLK0 or CLK1/CLK1), therefore all

associated specification limits are referenced to the negative edge of

the selected clock input.

available to this device only. The V

or PECL inputs and the V

single−ended input operation, the unused differential input is

connected to V

and V

to 0.5 mA. When not used, V

Features

•

*For additional information on our Pb−Free strategy and soldering details, please

January, 2011 − Rev. 11

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The NBSG111 is a 1−to−10 differential clock/data driver. The

Inputs incorporate internal 50 W termination resistors (input to VT

The Q[0:9] / Q[0:9] outputs have a differential synchronous enable

The V

RSPECL Output with Operating Range: V

3.465 V with V

Operating Range: V

Output

Maximum Input Clock Frequency > 6 GHz Typical

Maximum Input Data Rate > 6 Gb/s Typical

300 ps Typical Propagation Delay

60 ps Typical Rise and Fall Times

RSNECL Output with RSNECL or NECL Inputs with

RSECL Output Level (400 mV Peak−to−Peak Output), Differential

50 W Internal Input Termination Resistors

Compatible with Existing 2.5 V/3.3 V LVEP and EP Devices

Pb−Free Package is Available*

may also rebias AC coupled inputs. When used, decouple V

and V

via a 0.01 mF capacitor and limit current sourcing or sinking

and V

Reference Voltage Output

or V

= 0 V

pins are internally generated voltage supplies

= 0 V with V

as a switching reference voltage. V

pin is used for LVCMOS inputs. For

and V

is used for single−ended NECL

outputs should be left open.

= −2.375 V to −3.465 V

= 2.375 V to

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

*For further details, refer to Application Note

AND8002/D

(Note: Microdot may be in either location)

CASE 489A

FCBGA−49

BA SUFFIX

ORDERING INFORMATION

SG111 = Device Code

http://onsemi.com

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

Publication Order Number:

DIAGRAM*

MARKING

LYWG

NBSG111/D

111

Related parts for NBSG111BAG

NBSG111BAG Summary of contents

Page 1

... Reference Voltage Output BB MM • Pb−Free Package is Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2011 January, 2011 − Rev used for single−ended NECL or ...

Page 2

CLK1 VTCLK1 VTEN VTEN Figure 1. BGA−49 Pinout ...

Page 3

Table 1. PIN DESCRIPTION Pin Name A1,A7,G1,G7,C2, F3,D4, VTCLK0 F4 CLK0 ECL, CML, LVCMOS, LVDS, E5 VTCLK0 F5 CLK0 ECL, CML, LVCMOS, LVDS, C4 VTCLK1 B4 CLK1 ECL, CML, ...

Page 4

Table 2. FUNCTION TABLE 2. SEL/EN are the inverse of SEL/EN unless specified otherwise. (C5) VTSEL R TIN (C6) SEL (E4) VTCLK0 R TIN (F4) CLK0 (F5) CLK0 R R TIN 2 (E5) VTCLK0 (B4) CLK1 ...

Page 5

Table 4. ATTRIBUTES Internal Input Pulldown Resistor, R2 (CLK0, CLK0, CLK1, CLK1, SEL, SEL, EN, EN) Internal Input Pullup Resistor, R1 (CLK0, CLK1, SEL, EN) ESD Protection Moisture Sensitivity (Note 3) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec ...

Page 6

Table 6. DC CHARACTERISTICS, INPUT WITH RSPECL OUTPUT Symbol Characteristic I Negative Power Supply Current EE V Output HIGH Voltage (Note Output Voltage Amplitude OUTPP V Input HIGH Voltage IH (Single−Ended) (Notes 8 and 9) V Input ...

Page 7

Table 7. DC CHARACTERISTICS, INPUT WITH RSPECL OUTPUT Symbol Characteristic I Negative Power Supply Current EE V Output HIGH Voltage (Note Output Voltage Amplitude OUTPP V Input HIGH Voltage IH (Single−Ended) (Notes 8 and 9) V Input ...

Page 8

Table 8. DC CHARACTERISTICS, NECL OR RSNECL INPUT WITH NECL OUTPUT −3.465 V to −2.375 V (Note 12 Symbol Characteristic I Negative Power Supply Current EE VOH Output HIGH Voltage (Note 13) ...

Page 9

Table 9. AC CHARACTERISTICS V Symbol Characteristic V Output Voltage Amplitude OUTPP (See Figure 3) (Note 18 Propagation Delay to Output Differential PLH t Output Enable PHL Clock Select t Duty Cycle Skew (Note 19) SKEW Within−Device Skew ...

Page 10

Q Driver Device Q Figure 5. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device NBSG111BAHTBG NBSG111BA NBSG111BAR2 †For information on tape and reel specifications, including part orientation ...

Page 11

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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