EK42552-02 Peregrine Semiconductor, EK42552-02 Datasheet - Page 3

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EK42552-02

Manufacturer Part Number
EK42552-02
Description
BOARD EVAL FOR 42552 REV 02
Manufacturer
Peregrine Semiconductor
Series
UltraCMOS™, HaRP™r
Type
Switch, SPDTr
Datasheet

Specifications of EK42552-02

Frequency
0Hz ~ 7.5GHz
For Use With/related Products
PE42552
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
1046-1000
PE42552
Product Specification
Low Frequency Power Handling: Z
Figure 4 provides guidelines of how to adjust the Vdd
and input Power to the 42552 device. The upper limit
curve represents the maximum Input Power vs Vdd
recommended for this part.
Figure 4. Maximum Operating Power Limit
To allow for sustained operation under any load VSWR condition,
max power should be kept 6dB lower than max power in 50 Ohm.
Document No. 70-0246-03 │ www.psemi.com
-10
-12
-2
-4
-6
-8
8
6
4
2
0
2.9
vs. Vdd and Input Power @ 9 KHz
3
3.1
Upper Power Limit
3.2
Vdd (V)
3.3
3.4
L
= 50Ω
3.5
3.6
Figure 5 shows how the power limit in Figure 4 will
increase with frequency. As the frequency increases,
the contours and Maximum Power Limit Curve will
increase with the increase in power handling shown on
the curve.
Figure 5. Operating Power Offset vs.
Power Handling Examples
Example 1: Maximum power handling at 100kHz, Z=50
ohms, VSWR 1:1, and Vdd=3V
30
25
20
15
10
5
0
1
The power handling offset for 100kHz from Fig. 5 is
10dB
The max power handling at Vdd = 3V is 5.5dB from
Fig. 4
Derate power under mismatch conditions
Total maximum power handling for this example is
10dB + 5.5dB = 15.5dBm
©2008 Peregrine Semiconductor Corp. All rights reserved.
Frequency (Normalized to 9kHz)
10
Freq (kHz)
100
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1000

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