EK42552-02 Peregrine Semiconductor, EK42552-02 Datasheet - Page 2

no-image

EK42552-02

Manufacturer Part Number
EK42552-02
Description
BOARD EVAL FOR 42552 REV 02
Manufacturer
Peregrine Semiconductor
Series
UltraCMOS™, HaRP™r
Type
Switch, SPDTr
Datasheet

Specifications of EK42552-02

Frequency
0Hz ~ 7.5GHz
For Use With/related Products
PE42552
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
1046-1000
Figure 3. Pin Configuration (Top View)
Table 2. Pin Descriptions
Note: 1. Use VSS (pin 13, VSS = -VDD) to bypass and disable
internal negative voltage generator. Connect VSS (pin 13) to GND
(VSS = 0V) to enable internal negative voltage generator.
Table 3. Operating Ranges
V
V
(external power supply used)
V
(internal power supply used)
I
I
Control Voltage High
Control Voltage Low
T
RF Power In
Note: 1. Please consult low frequency graphs on page 3 for
recommended operating power level.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the PE42552 in
the 16-lead 3x3mm QFN package is MSL1.
©2008 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 9
GND
GND
GND
DD
SS
RF1
OP
DD
SS
SS
1, 3, 4, 5, 6,
8, 9, 10, 12
Negative Supply
Power Supply Current
Pin No.
Negative Power Supply Voltage
Negative Power Supply Voltage
Positive Power Supply Voltage
Operating temperature range
(V
(V
11
13
14
15
16
1
2
3
4
2
7
SS
SS
= 0V, Temp = +85 °C)
= -V
Parameter
1
(P
DD
IN
, Temp = 25 °C)
):
Pin Name
1 MHz ≤ 7.5 GHz
CTRL
GND
RFC
RF1
RF2
9 kHz ≤ 1 MHz
V
V
LS
DD
SS
12
11
10
9
RF Port 1
Ground
RF Common
RF Port 2
Negative supply voltage or GND
connection (Note 1)
CMOS level:
Logic Select - Used to determine
the definition for the CTRL pin (see
Table 5)
Nominal 3.3 V supply connection
RF2
GND
GND
GND
0.7xV
Min
-3.6
-0.1
3.0
-40
Description
DD
Typ
-3.3
3.3
0.0
-10
15
25
0.3xV
fig. 4,5
Max
-3.0
3.6
0.0
120
-40
85
30
DD
Units
dBm
dBm
µA
µA
°C
V
V
V
V
V
Table 4. Absolute Maximum Ratings
Note: 1. Human Body Model (HBM, MIL_STD 883 Method 3015.7)
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table. Operation
between operating range maximum and absolute
maximum for extended periods may reduce reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rating specified.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. Control Logic Truth Table
Logic Select (LS)
The Logic Select feature is used to determine the
definition for the CTRL pin.
Spurious Performance
The typical spurious performance of the PE42552 is
-116 dBm when VSS=0V (pin 13 = GND). If further
improvement is desired, the internal negative voltage
generator can be disabled by setting VSS = -VDD.
Switching Frequency
The PE42552 has a maximum 25 kHz switching rate
when the internal negative voltage generator is used
(pin 13=GND). The rate at which the PE42552 can be
switched is only limited to the switching time (Table 1) if
an external negative supply is provided at
(pin13=VSS).
Symbol
V
V
V
V
T
P
CTRL
V
ESD
DD
ST
LS
LS
IN
I
0
0
1
1
Document No. 70-0246-03 │ UltraCMOS™ RFIC Solutions
Power supply voltage
Voltage on any input except for
CTRL and LS inputs
Voltage on CTRL input
Voltage on LS input
Storage temperature range
Input Power:
9 kHz ≤ 1 MHz
1 MHz ≤ 7.5 GHz
ESD voltage (HBM)
ESD voltage (Machine Model)
Parameter/Conditions
CTRL
0
1
0
1
1
RFC-RF1
off
on
on
off
Min
-0.3
-0.3
-65
Product Specification
fig. 4,5
Max
V
1000
150
100
RFC-RF2
4.0
0.3
4.0
4.0
30
DD
PE42552
+
on
off
off
on
dBm
dBm
Units
°C
V
V
V
V
V
V

Related parts for EK42552-02