5962-9061102YA E2V, 5962-9061102YA Datasheet - Page 5

• Manufacturer Part Number: 5962-9061102YA
• Manufacturer: E2V

Specifications of 5962-9061102YA

• Lead Free Status / RoHS Status: Supplier Unconfirmed

DSCC FORM 2234
APR 97
883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-
4.3.1 Group A inspection.
4.3.2 Groups C and D inspections.
c. A data retention stress test shall be included as part of the screening procedure and shall consist of the following steps:
a.
b.
c.
d.
e.
a.
b.
(1) The devices selected for testing shall be programmed per 3.2.3.1 herein. After completion of testing, the devices shall
(2) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control
(3) T
(4) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
Margin test method.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10) Erase (see 3.10.1). Devices may be submitted for groups A, C, and D testing prior to erasure provided the devices
(11) Verify erasure (see 3.10.3).
for packaged devices and 300°C for unassembled devices.)
(Steps 1 through 4 may be performed at the wafer level. The maximum storage temperature shall not exceed 200°C
Tests shall be as specified in table II herein.
Subgroups 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
Subgroup 4 (C
design changes which may affect input or output capacitance. Capacitance shall be measured between the
designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and
output terminals tested.
See footnote 4/ of table II.
All devices selected for testing shall be programmed per 3.2.3.1 herein.
End-point electrical parameters shall be as specified in table II herein.
Steady-state life test conditions, method 1005 of MIL-STD-883.
be erased and verified (except devices submitted for group D testing).
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
DEFENSE SUPPLY CENTER COLUMBUS
A
= +125°C, minimum.
Program a minimum of 95% of the total number of cells, including the slowest programming cell (see 3.10.2).
Bake, unbiased, for 72 hours at +140°C, or for 48 hours at +150°C, or for 8 hours at +200°C, or for unassembled
devices only 2 hours at 300°C.
Perform electrical test (see 4.2b) at 25° including a margin test at Vm = 5.7 V and loose timing (i.e., = 1 µs).
Erase (see 3.10.1).
Program a minimum of 50 percent of the total number of cells, including the slowest programming cell (see 3.10.2).
Perform electrical test (see 4.2b) at 25° including a margin test at Vm = 5.7 V and loose timing (i.e., = 1 µs).
Perform burn-in (see 4.2a).
Perform electrical test (see 4.2b) at 25° including a margin test at Vm = 5.7 V and loose timing (i.e., = 1 µs).
Repeat step 8 at t
have been 100 percent seal tested in accordance with method 5004 of MIL-STD-883.
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43218-3990
STANDARD
IN
and C
C
= +125°C and -55°C.
OUT
measurement) shall be measured only for initial qualification and after any process or
SIZE
A
REVISION LEVEL
B
SHEET
5962-90611
5