TS68882MF1B/C20 E2V, TS68882MF1B/C20 Datasheet - Page 34

• Manufacturer Part Number: TS68882MF1B/C20
• Manufacturer: E2V

Specifications of TS68882MF1B/C20

• Operating Temperature (max): 125C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

8.23.3
8.23.4
8.23.5
8.23.6
8.23.7
8.23.8
8.23.9
34
0852B–HIREL–06/07
Clock (CLK)
Sense Device (SENSE)
Power (V
No Connect (NC)
Interfacing Methods
32-bit Data Bus Co-processor Connection
16-bit Data Bus Co-processor Connection
When performing a reset of the TS68882 after V
power-up time, the RESET line must have an asserted pulse width which is greater than two clock
cycles. For compatibility with all TS68000 Family devices, 10 clock cycles should be used as the
minimum.
The TS68882 clock input is a TTL-compatible signal that is internally buffered for development of the
internal clock signals. The clock input should be a constant frequency square wave with no stretching or
shaping techniques required. The clock should not be gated off at any time and must conform to mini-
mum and maximum period and pulse width times.
This pin may be used optionally as an additional GND pin, or as an indicator to external hardware that
the TS68882 is present in the system. This signal is internally connected to the GND of the die, but it is
not necessary to connect it to the external ground for correct device operation. If a pullup resistor (which
should be larger than 10 k ) is connected to this pin location, external hardware may sense the pres-
ence of the TS688882 in a system.
These pins provide the supply voltage and system reference level for the internal circuitry of the
TS68882. Care should be taken to reduce the noise level on these pins with appropriate capacitance
decoupling.
One pin of the TS68882 package is designated as a no connect (NC). This pin position is reserved for
future use, and should not be used for signal routing or connected to V
TS68882/TS68020 or TS68030 interfacing
The following paragraphs describe how to connect the TS68882 to a TS68020 or TS68030 for co-pro-
cessor operation via an 8-, 16-, or 32-bit data bus.
Figure 8-9
32-bit data bus. The TS68882 is configured to operate over a 32-bit data bus when both the A0 and SIZE
pins are connected to V
Figure 8-10
16-bit data bus. The TS68882 is configured to operate over a 16-bit data bus when the SIZE pin is con-
nected to V
must be connected to the sixteen most significant data pins (D16 - D31) when the TS68882 is configured
to operate over a 16-bit data bus (i.e., connect D0 to D16, D1 to D17,... and D15 to D31). The DSACK
pins of the two devices are directly connected, although it is not necessary to connect the DSACK0 pin
since the TS68882 never asserts it in this configuration.
CC
and GND)
illustrates the co-processor interface connection of a TS68882 to a TS68020/TS68030 via a
CC
illustrates the co-processor interface connection of a TS68882 to a TS68020/TS68030 via a
, and the A0 pin is connected to GND. The sixteen least significant data pins (D0-D15)
CC
.
CC
has been within tolerance for more than the initial
CC
or GND.
e2v semiconductors SAS 2007
TS68882